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@@ -4140,27 +4140,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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if (has_edp_encoder && !intel_encoder_is_pch_edp(&has_edp_encoder->base)) {
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ironlake_set_pll_edp(crtc, adjusted_mode->clock);
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- } else {
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- /* enable FDI RX PLL too */
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- reg = FDI_RX_CTL(pipe);
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- temp = I915_READ(reg);
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- I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE);
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-
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- POSTING_READ(reg);
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- udelay(200);
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-
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- /* enable FDI TX PLL too */
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- reg = FDI_TX_CTL(pipe);
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- temp = I915_READ(reg);
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- I915_WRITE(reg, temp | FDI_TX_PLL_ENABLE);
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-
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- /* enable FDI RX PCDCLK */
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- reg = FDI_RX_CTL(pipe);
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- temp = I915_READ(reg);
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- I915_WRITE(reg, temp | FDI_PCDCLK);
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-
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- POSTING_READ(reg);
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- udelay(200);
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}
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}
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