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@@ -68,6 +68,24 @@
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#define BCR_ILCRF (PA_BCR + 10)
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#define BCR_ILCRG (PA_BCR + 12)
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+#if defined(CONFIG_CPU_SUBTYPE_SH7709)
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+#define INTC_IRR0 0xa4000004UL
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+#define INTC_IRR1 0xa4000006UL
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+#define INTC_IRR2 0xa4000008UL
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+
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+#define INTC_ICR0 0xfffffee0UL
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+#define INTC_ICR1 0xa4000010UL
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+#define INTC_ICR2 0xa4000012UL
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+#define INTC_INTER 0xa4000014UL
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+
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+#define INTC_IPRC 0xa4000016UL
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+#define INTC_IPRD 0xa4000018UL
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+#define INTC_IPRE 0xa400001aUL
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+
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+#define IRQ0_IRQ 32
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+#define IRQ1_IRQ 33
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+#endif
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+
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#if defined(CONFIG_CPU_SUBTYPE_SH7705)
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#define IRQ_STNIC 12
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#define IRQ_CFCARD 14
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