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@@ -19,6 +19,7 @@
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* 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
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* 27-Aug-2005 Ben Dooks Add clock-slow info
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* 20-Oct-2005 Ben Dooks Fixed overflow in PLL (Guillaume Gourat)
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+ * 20-Oct-2005 Ben Dooks Add masks for DCLK (Guillaume Gourat)
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*/
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#ifndef __ASM_ARM_REGS_CLOCK
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@@ -67,11 +68,16 @@
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#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1)
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#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4)
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#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8)
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+#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4)
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+#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8)
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#define S3C2410_DCLKCON_DCLK1EN (1<<16)
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#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17)
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#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17)
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#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20)
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+#define S3C2410_DCLKCON_DCLK1_CMP(x) (((x) - 1) <<24)
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+#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20)
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+#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24)
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#define S3C2410_CLKDIVN_PDIVN (1<<0)
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#define S3C2410_CLKDIVN_HDIVN (1<<1)
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