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@@ -53,6 +53,7 @@
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#define SPIFMT_WDELAY_MASK 0x3f000000u
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#define SPIFMT_WDELAY_SHIFT 24
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#define SPIFMT_CHARLEN_MASK 0x0000001Fu
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+#define SPIFMT_PRESCALE_SHIFT 8
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/* SPIPC0 */
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@@ -266,6 +267,29 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
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}
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}
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+/**
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+ * davinci_spi_get_prescale - Calculates the correct prescale value
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+ * @maxspeed_hz: the maximum rate the SPI clock can run at
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+ *
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+ * This function calculates the prescale value that generates a clock rate
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+ * less than or equal to the specified maximum.
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+ *
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+ * Returns: calculated prescale - 1 for easy programming into SPI registers
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+ * or negative error number if valid prescalar cannot be updated.
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+ */
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+static inline int davinci_spi_get_prescale(struct davinci_spi *davinci_spi,
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+ u32 max_speed_hz)
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+{
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+ int ret;
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+
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+ ret = DIV_ROUND_UP(clk_get_rate(davinci_spi->clk), max_speed_hz);
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+
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+ if (ret < 3 || ret > 256)
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+ return -EINVAL;
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+
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+ return ret - 1;
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+}
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+
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/**
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* davinci_spi_setup_transfer - This functions will determine transfer method
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* @spi: spi device on which data transfer to be done
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@@ -281,7 +305,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
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struct davinci_spi *davinci_spi;
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u8 bits_per_word = 0;
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- u32 hz = 0, prescale = 0, clkspeed;
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+ u32 hz = 0, prescale = 0;
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davinci_spi = spi_master_get_devdata(spi->master);
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@@ -312,21 +336,18 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
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if (!hz)
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hz = spi->max_speed_hz;
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+ prescale = davinci_spi_get_prescale(davinci_spi, hz);
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+ if (prescale < 0)
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+ return prescale;
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+
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clear_fmt_bits(davinci_spi->base, SPIFMT_CHARLEN_MASK,
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spi->chip_select);
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set_fmt_bits(davinci_spi->base, bits_per_word & 0x1f,
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spi->chip_select);
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- clkspeed = clk_get_rate(davinci_spi->clk);
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- if (hz > clkspeed / 2)
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- prescale = 1 << 8;
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- if (hz < clkspeed / 256)
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- prescale = 255 << 8;
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- if (!prescale)
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- prescale = ((clkspeed / hz - 1) << 8) & 0x0000ff00;
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-
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clear_fmt_bits(davinci_spi->base, 0x0000ff00, spi->chip_select);
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- set_fmt_bits(davinci_spi->base, prescale, spi->chip_select);
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+ set_fmt_bits(davinci_spi->base,
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+ prescale << SPIFMT_PRESCALE_SHIFT, spi->chip_select);
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return 0;
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}
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@@ -413,10 +434,8 @@ static int davinci_spi_setup(struct spi_device *spi)
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int retval;
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struct davinci_spi *davinci_spi;
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struct davinci_spi_dma *davinci_spi_dma;
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- struct device *sdev;
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davinci_spi = spi_master_get_devdata(spi->master);
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- sdev = davinci_spi->bitbang.master->dev.parent;
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/* if bits per word length is zero then set it default 8 */
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if (!spi->bits_per_word)
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@@ -435,16 +454,6 @@ static int davinci_spi_setup(struct spi_device *spi)
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}
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}
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- /*
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- * SPI in DaVinci and DA8xx operate between
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- * 600 KHz and 50 MHz
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- */
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- if (spi->max_speed_hz < 600000 || spi->max_speed_hz > 50000000) {
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- dev_dbg(sdev, "Operating frequency is not in acceptable "
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- "range\n");
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- return -EINVAL;
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- }
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-
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/*
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* Set up SPIFMTn register, unique to this chipselect.
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*
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