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@@ -30,8 +30,8 @@ struct cpu_hw_events {
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u64 events[MAX_HWEVENTS];
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unsigned int flags[MAX_HWEVENTS];
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unsigned long mmcr[3];
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- struct perf_event *limited_event[MAX_LIMITED_HWEVENTS];
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- u8 limited_hwidx[MAX_LIMITED_HWEVENTS];
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+ struct perf_event *limited_counter[MAX_LIMITED_HWCOUNTERS];
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+ u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS];
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u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
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unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
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unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
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@@ -253,7 +253,7 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
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unsigned long addf = ppmu->add_fields;
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unsigned long tadd = ppmu->test_adder;
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- if (n_ev > ppmu->n_event)
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+ if (n_ev > ppmu->n_counter)
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return -1;
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/* First see if the events will go on as-is */
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@@ -426,7 +426,7 @@ static int is_limited_pmc(int pmcnum)
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&& (pmcnum == 5 || pmcnum == 6);
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}
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-static void freeze_limited_events(struct cpu_hw_events *cpuhw,
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+static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
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unsigned long pmc5, unsigned long pmc6)
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{
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struct perf_event *event;
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@@ -434,7 +434,7 @@ static void freeze_limited_events(struct cpu_hw_events *cpuhw,
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int i;
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for (i = 0; i < cpuhw->n_limited; ++i) {
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- event = cpuhw->limited_event[i];
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+ event = cpuhw->limited_counter[i];
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if (!event->hw.idx)
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continue;
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val = (event->hw.idx == 5) ? pmc5 : pmc6;
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@@ -445,7 +445,7 @@ static void freeze_limited_events(struct cpu_hw_events *cpuhw,
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}
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}
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-static void thaw_limited_events(struct cpu_hw_events *cpuhw,
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+static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
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unsigned long pmc5, unsigned long pmc6)
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{
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struct perf_event *event;
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@@ -453,7 +453,7 @@ static void thaw_limited_events(struct cpu_hw_events *cpuhw,
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int i;
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for (i = 0; i < cpuhw->n_limited; ++i) {
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- event = cpuhw->limited_event[i];
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+ event = cpuhw->limited_counter[i];
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event->hw.idx = cpuhw->limited_hwidx[i];
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val = (event->hw.idx == 5) ? pmc5 : pmc6;
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atomic64_set(&event->hw.prev_count, val);
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@@ -495,9 +495,9 @@ static void write_mmcr0(struct cpu_hw_events *cpuhw, unsigned long mmcr0)
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"i" (SPRN_PMC5), "i" (SPRN_PMC6));
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if (mmcr0 & MMCR0_FC)
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- freeze_limited_events(cpuhw, pmc5, pmc6);
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+ freeze_limited_counters(cpuhw, pmc5, pmc6);
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else
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- thaw_limited_events(cpuhw, pmc5, pmc6);
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+ thaw_limited_counters(cpuhw, pmc5, pmc6);
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/*
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* Write the full MMCR0 including the event overflow interrupt
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@@ -653,7 +653,7 @@ void hw_perf_enable(void)
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continue;
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idx = hwc_index[i] + 1;
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if (is_limited_pmc(idx)) {
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- cpuhw->limited_event[n_lim] = event;
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+ cpuhw->limited_counter[n_lim] = event;
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cpuhw->limited_hwidx[n_lim] = idx;
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++n_lim;
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continue;
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@@ -702,7 +702,7 @@ static int collect_events(struct perf_event *group, int max_count,
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flags[n] = group->hw.event_base;
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events[n++] = group->hw.config;
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}
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- list_for_each_entry(event, &group->sibling_list, list_entry) {
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+ list_for_each_entry(event, &group->sibling_list, group_entry) {
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if (!is_software_event(event) &&
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event->state != PERF_EVENT_STATE_OFF) {
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if (n >= max_count)
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@@ -742,7 +742,7 @@ int hw_perf_group_sched_in(struct perf_event *group_leader,
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return 0;
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cpuhw = &__get_cpu_var(cpu_hw_events);
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n0 = cpuhw->n_events;
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- n = collect_events(group_leader, ppmu->n_event - n0,
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+ n = collect_events(group_leader, ppmu->n_counter - n0,
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&cpuhw->event[n0], &cpuhw->events[n0],
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&cpuhw->flags[n0]);
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if (n < 0)
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@@ -764,7 +764,7 @@ int hw_perf_group_sched_in(struct perf_event *group_leader,
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cpuctx->active_oncpu += n;
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n = 1;
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event_sched_in(group_leader, cpu);
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- list_for_each_entry(sub, &group_leader->sibling_list, list_entry) {
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+ list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
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if (sub->state != PERF_EVENT_STATE_OFF) {
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event_sched_in(sub, cpu);
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++n;
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@@ -797,7 +797,7 @@ static int power_pmu_enable(struct perf_event *event)
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*/
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cpuhw = &__get_cpu_var(cpu_hw_events);
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n0 = cpuhw->n_events;
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- if (n0 >= ppmu->n_event)
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+ if (n0 >= ppmu->n_counter)
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goto out;
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cpuhw->event[n0] = event;
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cpuhw->events[n0] = event->hw.config;
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@@ -848,11 +848,11 @@ static void power_pmu_disable(struct perf_event *event)
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}
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}
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for (i = 0; i < cpuhw->n_limited; ++i)
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- if (event == cpuhw->limited_event[i])
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+ if (event == cpuhw->limited_counter[i])
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break;
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if (i < cpuhw->n_limited) {
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while (++i < cpuhw->n_limited) {
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- cpuhw->limited_event[i-1] = cpuhw->limited_event[i];
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+ cpuhw->limited_counter[i-1] = cpuhw->limited_counter[i];
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cpuhw->limited_hwidx[i-1] = cpuhw->limited_hwidx[i];
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}
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--cpuhw->n_limited;
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@@ -1078,7 +1078,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
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*/
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n = 0;
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if (event->group_leader != event) {
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- n = collect_events(event->group_leader, ppmu->n_event - 1,
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+ n = collect_events(event->group_leader, ppmu->n_counter - 1,
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ctrs, events, cflags);
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if (n < 0)
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return ERR_PTR(-EINVAL);
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@@ -1230,7 +1230,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
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int nmi;
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if (cpuhw->n_limited)
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- freeze_limited_events(cpuhw, mfspr(SPRN_PMC5),
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+ freeze_limited_counters(cpuhw, mfspr(SPRN_PMC5),
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mfspr(SPRN_PMC6));
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perf_read_regs(regs);
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@@ -1260,7 +1260,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
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* Any that we processed in the previous loop will not be negative.
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*/
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if (!found) {
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- for (i = 0; i < ppmu->n_event; ++i) {
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+ for (i = 0; i < ppmu->n_counter; ++i) {
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if (is_limited_pmc(i + 1))
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continue;
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val = read_pmc(i + 1);
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