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+/*
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+ * An SPI driver for the Philips PCF2123 RTC
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+ * Copyright 2009 Cyber Switching, Inc.
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+ *
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+ * Author: Chris Verges <chrisv@cyberswitching.com>
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+ * Maintainers: http://www.cyberswitching.com
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+ *
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+ * based on the RS5C348 driver in this same directory.
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+ *
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+ * Thanks to Christian Pellegrin <chripell@fsfe.org> for
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+ * the sysfs contributions to this driver.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * Please note that the CS is active high, so platform data
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+ * should look something like:
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+ *
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+ * static struct spi_board_info ek_spi_devices[] = {
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+ * ...
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+ * {
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+ * .modalias = "rtc-pcf2123",
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+ * .chip_select = 1,
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+ * .controller_data = (void *)AT91_PIN_PA10,
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+ * .max_speed_hz = 1000 * 1000,
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+ * .mode = SPI_CS_HIGH,
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+ * .bus_num = 0,
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+ * },
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+ * ...
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+ *};
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+ *
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+ */
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+
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+#include <linux/bcd.h>
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+#include <linux/delay.h>
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+#include <linux/device.h>
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+#include <linux/errno.h>
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/string.h>
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+#include <linux/rtc.h>
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+#include <linux/spi/spi.h>
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+
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+#define DRV_VERSION "0.5"
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+
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+#define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */
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+#define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */
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+#define PCF2123_REG_SC (0x02) /* datetime */
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+#define PCF2123_REG_MN (0x03)
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+#define PCF2123_REG_HR (0x04)
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+#define PCF2123_REG_DM (0x05)
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+#define PCF2123_REG_DW (0x06)
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+#define PCF2123_REG_MO (0x07)
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+#define PCF2123_REG_YR (0x08)
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+
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+#define PCF2123_SUBADDR (1 << 4)
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+#define PCF2123_WRITE ((0 << 7) | PCF2123_SUBADDR)
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+#define PCF2123_READ ((1 << 7) | PCF2123_SUBADDR)
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+
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+static struct spi_driver pcf2123_driver;
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+
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+struct pcf2123_sysfs_reg {
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+ struct device_attribute attr; /* must be first */
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+ char name[2];
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+};
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+
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+struct pcf2123_plat_data {
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+ struct rtc_device *rtc;
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+ struct pcf2123_sysfs_reg regs[16];
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+};
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+
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+/*
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+ * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select
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+ * is released properly after an SPI write. This function should be
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+ * called after EVERY read/write call over SPI.
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+ */
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+static inline void pcf2123_delay_trec(void)
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+{
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+ ndelay(30);
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+}
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+
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+static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
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+ char *buffer)
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+{
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+ struct spi_device *spi = to_spi_device(dev);
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+ struct pcf2123_sysfs_reg *r = (struct pcf2123_sysfs_reg *) attr;
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+ u8 txbuf[1], rxbuf[1];
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+ int ret;
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+
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+ txbuf[0] = PCF2123_READ | simple_strtoul(r->name, NULL, 16);
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+ ret = spi_write_then_read(spi, txbuf, 1, rxbuf, 1);
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+ if (ret < 0)
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+ return sprintf(buffer, "error: %d", ret);
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+ pcf2123_delay_trec();
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+ return sprintf(buffer, "0x%x", rxbuf[0]);
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+}
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+
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+static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
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+ const char *buffer, size_t count) {
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+ struct spi_device *spi = to_spi_device(dev);
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+ struct pcf2123_sysfs_reg *r = (struct pcf2123_sysfs_reg *) attr;
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+ u8 txbuf[2];
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+ int ret;
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+
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+ txbuf[0] = PCF2123_WRITE | simple_strtoul(r->name, NULL, 16);
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+ txbuf[1] = simple_strtoul(buffer, NULL, 0);
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+ ret = spi_write(spi, txbuf, sizeof(txbuf));
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+ if (ret < 0)
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+ return -EIO;
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+ pcf2123_delay_trec();
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+ return count;
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+}
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+
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+static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
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+{
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+ struct spi_device *spi = to_spi_device(dev);
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+ u8 txbuf[1], rxbuf[7];
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+ int ret;
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+
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+ txbuf[0] = PCF2123_READ | PCF2123_REG_SC;
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+ ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
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+ rxbuf, sizeof(rxbuf));
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
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+ tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
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+ tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */
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+ tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
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+ tm->tm_wday = rxbuf[4] & 0x07;
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+ tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */
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+ tm->tm_year = bcd2bin(rxbuf[6]);
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+ if (tm->tm_year < 70)
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+ tm->tm_year += 100; /* assume we are in 1970...2069 */
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+
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+ dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
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+ "mday=%d, mon=%d, year=%d, wday=%d\n",
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+ __func__,
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+ tm->tm_sec, tm->tm_min, tm->tm_hour,
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+ tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
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+
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+ /* the clock can give out invalid datetime, but we cannot return
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+ * -EINVAL otherwise hwclock will refuse to set the time on bootup.
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+ */
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+ if (rtc_valid_tm(tm) < 0)
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+ dev_err(dev, "retrieved date/time is not valid.\n");
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+
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+ return 0;
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+}
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+
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+static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
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+{
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+ struct spi_device *spi = to_spi_device(dev);
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+ u8 txbuf[8];
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+ int ret;
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+
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+ dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
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+ "mday=%d, mon=%d, year=%d, wday=%d\n",
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+ __func__,
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+ tm->tm_sec, tm->tm_min, tm->tm_hour,
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+ tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
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+
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+ /* Stop the counter first */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
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+ txbuf[1] = 0x20;
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+ ret = spi_write(spi, txbuf, 2);
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ /* Set the new time */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_SC;
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+ txbuf[1] = bin2bcd(tm->tm_sec & 0x7F);
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+ txbuf[2] = bin2bcd(tm->tm_min & 0x7F);
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+ txbuf[3] = bin2bcd(tm->tm_hour & 0x3F);
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+ txbuf[4] = bin2bcd(tm->tm_mday & 0x3F);
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+ txbuf[5] = tm->tm_wday & 0x07;
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+ txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
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+ txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100);
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+
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+ ret = spi_write(spi, txbuf, sizeof(txbuf));
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ /* Start the counter */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
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+ txbuf[1] = 0x00;
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+ ret = spi_write(spi, txbuf, 2);
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ return 0;
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+}
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+
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+static const struct rtc_class_ops pcf2123_rtc_ops = {
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+ .read_time = pcf2123_rtc_read_time,
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+ .set_time = pcf2123_rtc_set_time,
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+};
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+
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+static int __devinit pcf2123_probe(struct spi_device *spi)
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+{
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+ struct rtc_device *rtc;
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+ struct pcf2123_plat_data *pdata;
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+ u8 txbuf[2], rxbuf[2];
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+ int ret, i;
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+
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+ pdata = kzalloc(sizeof(struct pcf2123_plat_data), GFP_KERNEL);
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+ if (!pdata)
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+ return -ENOMEM;
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+ spi->dev.platform_data = pdata;
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+
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+ /* Send a software reset command */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
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+ txbuf[1] = 0x58;
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+ dev_dbg(&spi->dev, "resetting RTC (0x%02X 0x%02X)\n",
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+ txbuf[0], txbuf[1]);
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+ ret = spi_write(spi, txbuf, 2 * sizeof(u8));
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ /* Stop the counter */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
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+ txbuf[1] = 0x20;
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+ dev_dbg(&spi->dev, "stopping RTC (0x%02X 0x%02X)\n",
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+ txbuf[0], txbuf[1]);
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+ ret = spi_write(spi, txbuf, 2 * sizeof(u8));
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+ if (ret < 0)
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+ return ret;
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+ pcf2123_delay_trec();
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+
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+ /* See if the counter was actually stopped */
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+ txbuf[0] = PCF2123_READ | PCF2123_REG_CTRL1;
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+ dev_dbg(&spi->dev, "checking for presence of RTC (0x%02X)\n",
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+ txbuf[0]);
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+ ret = spi_write_then_read(spi, txbuf, 1 * sizeof(u8),
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+ rxbuf, 2 * sizeof(u8));
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+ dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n",
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+ rxbuf[0], rxbuf[1]);
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+ if (ret < 0)
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+ goto kfree_exit;
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+ pcf2123_delay_trec();
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+
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+ if (!(rxbuf[0] & 0x20)) {
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+ dev_err(&spi->dev, "chip not found\n");
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+ goto kfree_exit;
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+ }
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+
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+ dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
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+ dev_info(&spi->dev, "spiclk %u KHz.\n",
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+ (spi->max_speed_hz + 500) / 1000);
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+
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+ /* Start the counter */
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+ txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
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+ txbuf[1] = 0x00;
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+ ret = spi_write(spi, txbuf, sizeof(txbuf));
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+ if (ret < 0)
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+ goto kfree_exit;
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+ pcf2123_delay_trec();
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+
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+ /* Finalize the initialization */
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+ rtc = rtc_device_register(pcf2123_driver.driver.name, &spi->dev,
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+ &pcf2123_rtc_ops, THIS_MODULE);
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+
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+ if (IS_ERR(rtc)) {
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+ dev_err(&spi->dev, "failed to register.\n");
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+ ret = PTR_ERR(rtc);
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+ goto kfree_exit;
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+ }
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+
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+ pdata->rtc = rtc;
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+
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+ for (i = 0; i < 16; i++) {
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+ sprintf(pdata->regs[i].name, "%1x", i);
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+ pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR;
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+ pdata->regs[i].attr.attr.name = pdata->regs[i].name;
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+ pdata->regs[i].attr.show = pcf2123_show;
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+ pdata->regs[i].attr.store = pcf2123_store;
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+ ret = device_create_file(&spi->dev, &pdata->regs[i].attr);
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+ if (ret) {
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+ dev_err(&spi->dev, "Unable to create sysfs %s\n",
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+ pdata->regs[i].name);
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+ pdata->regs[i].name[0] = '\0';
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+ }
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+ }
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+
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+ return 0;
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+kfree_exit:
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+ kfree(pdata);
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+ spi->dev.platform_data = NULL;
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+ return ret;
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+}
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+
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+static int pcf2123_remove(struct spi_device *spi)
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+{
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+ struct pcf2123_plat_data *pdata = spi->dev.platform_data;
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+ int i;
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+
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+ if (pdata) {
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+ struct rtc_device *rtc = pdata->rtc;
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+
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+ if (rtc)
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+ rtc_device_unregister(rtc);
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+ for (i = 0; i < 16; i++)
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+ if (pdata->regs[i].name[0])
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+ device_remove_file(&spi->dev,
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+ &pdata->regs[i].attr);
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+ kfree(pdata);
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+ }
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+
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+ return 0;
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+}
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+
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+static struct spi_driver pcf2123_driver = {
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+ .driver = {
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+ .name = "rtc-pcf2123",
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+ .bus = &spi_bus_type,
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = pcf2123_probe,
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+ .remove = __devexit_p(pcf2123_remove),
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+};
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+
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+static int __init pcf2123_init(void)
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+{
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+ return spi_register_driver(&pcf2123_driver);
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+}
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+
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+static void __exit pcf2123_exit(void)
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+{
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+ spi_unregister_driver(&pcf2123_driver);
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+}
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+
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+MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>");
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+MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
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+MODULE_LICENSE("GPL");
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+MODULE_VERSION(DRV_VERSION);
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+
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+module_init(pcf2123_init);
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+module_exit(pcf2123_exit);
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