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@@ -126,6 +126,11 @@ enum dss_clk_source {
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* OMAP4: DSS_FCLK */
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};
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+enum dss_hdmi_venc_clk_source_select {
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+ DSS_VENC_TV_CLK = 0,
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+ DSS_HDMI_M_PCLK = 1,
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+};
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+
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struct dss_clock_info {
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/* rates that we get with dividers below */
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unsigned long fck;
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@@ -214,6 +219,7 @@ void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
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int dss_init_platform_driver(void);
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void dss_uninit_platform_driver(void);
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+void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
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void dss_save_context(void);
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void dss_restore_context(void);
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void dss_clk_enable(enum dss_clock clks);
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