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@@ -512,7 +512,7 @@ static bool is_pipeb_lvds(struct drm_device *dev, struct drm_crtc *crtc)
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return false;
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}
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-static void cdv_intel_disable_self_refresh (struct drm_device *dev)
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+void cdv_intel_disable_self_refresh(struct drm_device *dev)
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{
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if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) {
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@@ -533,7 +533,7 @@ static void cdv_intel_disable_self_refresh (struct drm_device *dev)
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}
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-static void cdv_intel_update_watermark (struct drm_device *dev, struct drm_crtc *crtc)
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+void cdv_intel_update_watermark(struct drm_device *dev, struct drm_crtc *crtc)
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{
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if (cdv_intel_single_pipe_active(dev)) {
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@@ -645,137 +645,6 @@ static void cdv_intel_crtc_load_lut(struct drm_crtc *crtc)
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}
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}
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-/**
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- * Sets the power management mode of the pipe and plane.
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- *
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- * This code should probably grow support for turning the cursor off and back
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- * on appropriately at the same time as we're turning the pipe off/on.
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- */
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-static void cdv_intel_crtc_dpms(struct drm_crtc *crtc, int mode)
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-{
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- struct drm_device *dev = crtc->dev;
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- struct drm_psb_private *dev_priv = dev->dev_private;
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- struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
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- int pipe = psb_intel_crtc->pipe;
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- const struct psb_offset *map = &dev_priv->regmap[pipe];
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- u32 temp;
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-
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- /* XXX: When our outputs are all unaware of DPMS modes other than off
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- * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
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- */
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- cdv_intel_disable_self_refresh(dev);
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-
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- switch (mode) {
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- case DRM_MODE_DPMS_ON:
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- case DRM_MODE_DPMS_STANDBY:
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- case DRM_MODE_DPMS_SUSPEND:
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- if (psb_intel_crtc->active)
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- break;
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-
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- psb_intel_crtc->active = true;
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-
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- /* Enable the DPLL */
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- temp = REG_READ(map->dpll);
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- if ((temp & DPLL_VCO_ENABLE) == 0) {
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- REG_WRITE(map->dpll, temp);
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- REG_READ(map->dpll);
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- /* Wait for the clocks to stabilize. */
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- udelay(150);
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- REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
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- REG_READ(map->dpll);
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- /* Wait for the clocks to stabilize. */
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- udelay(150);
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- REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
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- REG_READ(map->dpll);
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- /* Wait for the clocks to stabilize. */
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- udelay(150);
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- }
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-
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- /* Jim Bish - switch plan and pipe per scott */
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- /* Enable the plane */
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- temp = REG_READ(map->cntr);
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- if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
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- REG_WRITE(map->cntr,
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- temp | DISPLAY_PLANE_ENABLE);
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- /* Flush the plane changes */
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- REG_WRITE(map->base, REG_READ(map->base));
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- }
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-
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- udelay(150);
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-
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- /* Enable the pipe */
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- temp = REG_READ(map->conf);
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- if ((temp & PIPEACONF_ENABLE) == 0)
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- REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
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-
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- temp = REG_READ(map->status);
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- temp &= ~(0xFFFF);
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- temp |= PIPE_FIFO_UNDERRUN;
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- REG_WRITE(map->status, temp);
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- REG_READ(map->status);
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-
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- cdv_intel_crtc_load_lut(crtc);
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-
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- /* Give the overlay scaler a chance to enable
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- * if it's on this pipe */
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- /* psb_intel_crtc_dpms_video(crtc, true); TODO */
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- break;
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- case DRM_MODE_DPMS_OFF:
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- if (!psb_intel_crtc->active)
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- break;
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-
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- psb_intel_crtc->active = false;
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-
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- /* Give the overlay scaler a chance to disable
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- * if it's on this pipe */
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- /* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
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-
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- /* Disable the VGA plane that we never use */
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- REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
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-
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- /* Jim Bish - changed pipe/plane here as well. */
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-
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- drm_vblank_off(dev, pipe);
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- /* Wait for vblank for the disable to take effect */
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- gma_wait_for_vblank(dev);
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-
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- /* Next, disable display pipes */
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- temp = REG_READ(map->conf);
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- if ((temp & PIPEACONF_ENABLE) != 0) {
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- REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
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- REG_READ(map->conf);
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- }
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-
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- /* Wait for vblank for the disable to take effect. */
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- gma_wait_for_vblank(dev);
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-
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- udelay(150);
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-
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- /* Disable display plane */
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- temp = REG_READ(map->cntr);
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- if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
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- REG_WRITE(map->cntr,
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- temp & ~DISPLAY_PLANE_ENABLE);
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- /* Flush the plane changes */
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- REG_WRITE(map->base, REG_READ(map->base));
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- REG_READ(map->base);
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- }
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-
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- temp = REG_READ(map->dpll);
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- if ((temp & DPLL_VCO_ENABLE) != 0) {
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- REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
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- REG_READ(map->dpll);
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- }
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-
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- /* Wait for the clocks to turn off. */
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- udelay(150);
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- break;
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- }
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- cdv_intel_update_watermark(dev, crtc);
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- /*Set FIFO Watermarks*/
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- REG_WRITE(DSPARB, 0x3F3E);
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-}
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-
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/**
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* Return the pipe currently connected to the panel fitter,
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* or -1 if the panel fitter is not present or not in use
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@@ -1518,7 +1387,7 @@ struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
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}
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const struct drm_crtc_helper_funcs cdv_intel_helper_funcs = {
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- .dpms = cdv_intel_crtc_dpms,
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+ .dpms = gma_crtc_dpms,
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.mode_fixup = gma_crtc_mode_fixup,
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.mode_set = cdv_intel_crtc_mode_set,
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.mode_set_base = gma_pipe_set_base,
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