|
@@ -703,13 +703,13 @@ struct flash_info {
|
|
|
.flags = (_flags), \
|
|
|
})
|
|
|
|
|
|
-#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \
|
|
|
+#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flags) \
|
|
|
((kernel_ulong_t)&(struct flash_info) { \
|
|
|
.sector_size = (_sector_size), \
|
|
|
.n_sectors = (_n_sectors), \
|
|
|
.page_size = (_page_size), \
|
|
|
.addr_width = (_addr_width), \
|
|
|
- .flags = M25P_NO_ERASE, \
|
|
|
+ .flags = (_flags), \
|
|
|
})
|
|
|
|
|
|
/* NOTE: double check command sets and memory organization when you add
|
|
@@ -741,7 +741,7 @@ static const struct spi_device_id m25p_ids[] = {
|
|
|
{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
|
|
|
|
|
|
/* Everspin */
|
|
|
- { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) },
|
|
|
+ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, M25P_NO_ERASE) },
|
|
|
|
|
|
/* GigaDevice */
|
|
|
{ "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
|
|
@@ -856,11 +856,11 @@ static const struct spi_device_id m25p_ids[] = {
|
|
|
{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) },
|
|
|
|
|
|
/* Catalyst / On Semiconductor -- non-JEDEC */
|
|
|
- { "cat25c11", CAT25_INFO( 16, 8, 16, 1) },
|
|
|
- { "cat25c03", CAT25_INFO( 32, 8, 16, 2) },
|
|
|
- { "cat25c09", CAT25_INFO( 128, 8, 32, 2) },
|
|
|
- { "cat25c17", CAT25_INFO( 256, 8, 32, 2) },
|
|
|
- { "cat25128", CAT25_INFO(2048, 8, 64, 2) },
|
|
|
+ { "cat25c11", CAT25_INFO( 16, 8, 16, 1, M25P_NO_ERASE) },
|
|
|
+ { "cat25c03", CAT25_INFO( 32, 8, 16, 2, M25P_NO_ERASE) },
|
|
|
+ { "cat25c09", CAT25_INFO( 128, 8, 32, 2, M25P_NO_ERASE) },
|
|
|
+ { "cat25c17", CAT25_INFO( 256, 8, 32, 2, M25P_NO_ERASE) },
|
|
|
+ { "cat25128", CAT25_INFO(2048, 8, 64, 2, M25P_NO_ERASE) },
|
|
|
{ },
|
|
|
};
|
|
|
MODULE_DEVICE_TABLE(spi, m25p_ids);
|