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@@ -82,14 +82,14 @@ int lis3l02dq_spi_read_reg_8(struct iio_dev *indio_dev,
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**/
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int lis3l02dq_spi_write_reg_8(struct iio_dev *indio_dev,
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u8 reg_address,
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- u8 *val)
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+ u8 val)
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{
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int ret;
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struct lis3l02dq_state *st = iio_priv(indio_dev);
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mutex_lock(&st->buf_lock);
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st->tx[0] = LIS3L02DQ_WRITE_REG(reg_address);
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- st->tx[1] = *val;
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+ st->tx[1] = val;
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ret = spi_write(st->us, st->tx, 2);
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mutex_unlock(&st->buf_lock);
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@@ -232,14 +232,14 @@ static int lis3l02dq_write_raw(struct iio_dev *indio_dev,
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return -EINVAL;
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sval = val;
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reg = lis3l02dq_axis_map[LIS3L02DQ_BIAS][chan->address];
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- ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, (u8 *)&sval);
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+ ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, sval);
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break;
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case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
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if (val & ~0xFF)
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return -EINVAL;
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uval = val;
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reg = lis3l02dq_axis_map[LIS3L02DQ_GAIN][chan->address];
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- ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, &uval);
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+ ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, uval);
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break;
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}
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return ret;
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@@ -367,7 +367,7 @@ static ssize_t lis3l02dq_write_frequency(struct device *dev,
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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- &t);
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+ t);
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error_ret_mutex:
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mutex_unlock(&indio_dev->mlock);
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@@ -389,7 +389,7 @@ static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
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/* Write suitable defaults to ctrl1 */
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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- &val);
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+ val);
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if (ret) {
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dev_err(&st->us->dev, "problem with setup control register 1");
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goto err_ret;
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@@ -397,7 +397,7 @@ static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
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/* Repeat as sometimes doesn't work first time?*/
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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- &val);
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+ val);
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if (ret) {
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dev_err(&st->us->dev, "problem with setup control register 1");
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goto err_ret;
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@@ -418,7 +418,7 @@ static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
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val = LIS3L02DQ_DEFAULT_CTRL2;
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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- &val);
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+ val);
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if (ret) {
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dev_err(&st->us->dev, "problem with setup control register 2");
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goto err_ret;
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@@ -427,7 +427,7 @@ static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
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val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC;
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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- &val);
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+ val);
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if (ret)
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dev_err(&st->us->dev, "problem with interrupt cfg register");
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err_ret:
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@@ -564,7 +564,7 @@ int lis3l02dq_disable_all_events(struct iio_dev *indio_dev)
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control &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT;
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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- &control);
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+ control);
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if (ret)
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goto error_ret;
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/* Also for consistency clear the mask */
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@@ -577,7 +577,7 @@ int lis3l02dq_disable_all_events(struct iio_dev *indio_dev)
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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- &val);
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+ val);
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if (ret)
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goto error_ret;
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@@ -623,7 +623,7 @@ static int lis3l02dq_write_event_config(struct iio_dev *indio_dev,
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if (changed) {
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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- &val);
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+ val);
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if (ret)
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goto error_ret;
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control = val & 0x3f ?
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@@ -631,7 +631,7 @@ static int lis3l02dq_write_event_config(struct iio_dev *indio_dev,
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(control & ~LIS3L02DQ_REG_CTRL_2_ENABLE_INTERRUPT);
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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- &control);
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+ control);
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if (ret)
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goto error_ret;
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}
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@@ -750,7 +750,7 @@ static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
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mutex_lock(&indio_dev->mlock);
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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- &val);
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+ val);
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if (ret) {
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dev_err(&st->us->dev, "problem with turning device off: ctrl1");
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goto err_ret;
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@@ -758,7 +758,7 @@ static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
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ret = lis3l02dq_spi_write_reg_8(indio_dev,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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- &val);
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+ val);
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if (ret)
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dev_err(&st->us->dev, "problem with turning device off: ctrl2");
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err_ret:
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