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@@ -4956,6 +4956,32 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
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u32 int_reg)
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u32 int_reg)
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{
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{
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irqreturn_t rc = IRQ_HANDLED;
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irqreturn_t rc = IRQ_HANDLED;
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+ u32 int_mask_reg;
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+
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+ int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
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+ int_reg &= ~int_mask_reg;
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+
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+ /* If an interrupt on the adapter did not occur, ignore it.
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+ * Or in the case of SIS 64, check for a stage change interrupt.
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+ */
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+ if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
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+ if (ioa_cfg->sis64) {
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+ int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
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+ if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
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+
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+ /* clear stage change */
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+ writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
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+ list_del(&ioa_cfg->reset_cmd->queue);
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+ del_timer(&ioa_cfg->reset_cmd->timer);
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+ ipr_reset_ioa_job(ioa_cfg->reset_cmd);
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+ return IRQ_HANDLED;
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+ }
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+ }
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+
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+ return IRQ_NONE;
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+ }
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if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
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if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
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/* Mask the interrupt */
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/* Mask the interrupt */
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@@ -4968,6 +4994,13 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
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list_del(&ioa_cfg->reset_cmd->queue);
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list_del(&ioa_cfg->reset_cmd->queue);
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del_timer(&ioa_cfg->reset_cmd->timer);
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del_timer(&ioa_cfg->reset_cmd->timer);
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ipr_reset_ioa_job(ioa_cfg->reset_cmd);
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ipr_reset_ioa_job(ioa_cfg->reset_cmd);
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+ } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
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+ if (ipr_debug && printk_ratelimit())
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+ dev_err(&ioa_cfg->pdev->dev,
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+ "Spurious interrupt detected. 0x%08X\n", int_reg);
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+ writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
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+ return IRQ_NONE;
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} else {
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} else {
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if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
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if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
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ioa_cfg->ioa_unit_checked = 1;
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ioa_cfg->ioa_unit_checked = 1;
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@@ -5016,10 +5049,11 @@ static irqreturn_t ipr_isr(int irq, void *devp)
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{
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{
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struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
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struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
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unsigned long lock_flags = 0;
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unsigned long lock_flags = 0;
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- u32 int_reg, int_mask_reg;
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+ u32 int_reg = 0;
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u32 ioasc;
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u32 ioasc;
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u16 cmd_index;
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u16 cmd_index;
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int num_hrrq = 0;
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int num_hrrq = 0;
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+ int irq_none = 0;
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struct ipr_cmnd *ipr_cmd;
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struct ipr_cmnd *ipr_cmd;
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irqreturn_t rc = IRQ_NONE;
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irqreturn_t rc = IRQ_NONE;
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@@ -5031,33 +5065,6 @@ static irqreturn_t ipr_isr(int irq, void *devp)
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return IRQ_NONE;
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return IRQ_NONE;
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}
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}
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- int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
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- int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32) & ~int_mask_reg;
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-
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- /* If an interrupt on the adapter did not occur, ignore it.
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- * Or in the case of SIS 64, check for a stage change interrupt.
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- */
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- if (unlikely((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0)) {
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- if (ioa_cfg->sis64) {
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- int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
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- int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
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- if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
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-
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- /* clear stage change */
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- writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
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- int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
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- list_del(&ioa_cfg->reset_cmd->queue);
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- del_timer(&ioa_cfg->reset_cmd->timer);
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- ipr_reset_ioa_job(ioa_cfg->reset_cmd);
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- spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
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- return IRQ_HANDLED;
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- }
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- }
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-
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- spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
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- return IRQ_NONE;
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- }
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-
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while (1) {
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while (1) {
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ipr_cmd = NULL;
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ipr_cmd = NULL;
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@@ -5097,7 +5104,7 @@ static irqreturn_t ipr_isr(int irq, void *devp)
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/* Clear the PCI interrupt */
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/* Clear the PCI interrupt */
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do {
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do {
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writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
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writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
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- int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32) & ~int_mask_reg;
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
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} while (int_reg & IPR_PCII_HRRQ_UPDATED &&
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} while (int_reg & IPR_PCII_HRRQ_UPDATED &&
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num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
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num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
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@@ -5107,6 +5114,9 @@ static irqreturn_t ipr_isr(int irq, void *devp)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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+ } else if (rc == IRQ_NONE && irq_none == 0) {
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
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+ irq_none++;
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} else
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} else
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break;
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break;
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}
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}
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