Browse Source

IB/ipath: Add ipath_read_ireg() abstraction

Different chips have different width interrupt status registers, so add
a flag and accessor function to decide which width register read to use.

Signed-off-by: Arthur Jones <arthur.jones@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Arthur Jones 17 years ago
parent
commit
7da0498e7f

+ 2 - 2
drivers/infiniband/hw/ipath/ipath_intr.c

@@ -883,7 +883,7 @@ static noinline void ipath_bad_intr(struct ipath_devdata *dd, u32 *unexpectp)
 				dd->ipath_f_free_irq(dd);
 			}
 		}
-		if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) {
+		if (ipath_read_ireg(dd, dd->ipath_kregs->kr_intmask)) {
 			ipath_dev_err(dd, "%u unexpected interrupts, "
 				      "disabling interrupts completely\n",
 				      *unexpectp);
@@ -1034,7 +1034,7 @@ irqreturn_t ipath_intr(int irq, void *data)
 		goto bail;
 	}
 
-	istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
+	istat = ipath_read_ireg(dd, dd->ipath_kregs->kr_intstatus);
 
 	if (unlikely(!istat)) {
 		ipath_stats.sps_nullintr++;

+ 8 - 0
drivers/infiniband/hw/ipath/ipath_kernel.h

@@ -753,6 +753,8 @@ int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
 		 * are 64bit */
 #define IPATH_32BITCOUNTERS 0x20000
 		/* can miss port0 rx interrupts */
+		/* Interrupt register is 64 bits */
+#define IPATH_INTREG_64     0x40000
 #define IPATH_DISABLED      0x80000 /* administratively disabled */
 		/* Use GPIO interrupts for new counters */
 #define IPATH_GPIO_ERRINTRS 0x100000
@@ -958,6 +960,12 @@ static inline u32 ipath_get_rcvhdrtail(const struct ipath_portdata *pd)
 				pd->port_rcvhdrtail_kvaddr));
 }
 
+static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
+{
+	return (dd->ipath_flags & IPATH_INTREG_64) ?
+		ipath_read_kreg64(dd, r) : ipath_read_kreg32(dd, r);
+}
+
 /*
  * sysfs interface.
  */