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Intel IOMMU: Intel iommu cmdline option - forcedac

Introduce intel_iommu=forcedac commandline option.  This option is helpful to
verify the pci device capability of handling physical dma'able address greater
than 4G.

Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Muli Ben-Yehuda <muli@il.ibm.com>
Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
Cc: Arjan van de Ven <arjan@infradead.org>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Christoph Lameter <clameter@sgi.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Keshavamurthy, Anil S 17 年之前
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7d3b03ce7b
共有 2 個文件被更改,包括 13 次插入1 次删除
  1. 7 0
      Documentation/kernel-parameters.txt
  2. 6 1
      drivers/pci/intel-iommu.c

+ 7 - 0
Documentation/kernel-parameters.txt

@@ -781,6 +781,13 @@ and is between 256 and 4096 characters. It is defined in the file
 			bypassed by not enabling DMAR with this option. In
 			bypassed by not enabling DMAR with this option. In
 			this case, gfx device will use physical address for
 			this case, gfx device will use physical address for
 			DMA.
 			DMA.
+		forcedac [x86_64]
+			With this option iommu will not optimize to look
+			for io virtual address below 32 bit forcing dual
+			address cycle on pci bus for cards supporting greater
+			than 32 bit addressing. The default is to look
+			for translation below 32 bit and if not available
+			then look in the higher range.
 
 
 	io7=		[HW] IO7 for Marvel based alpha systems
 	io7=		[HW] IO7 for Marvel based alpha systems
 			See comment before marvel_specify_io7 in
 			See comment before marvel_specify_io7 in

+ 6 - 1
drivers/pci/intel-iommu.c

@@ -54,6 +54,7 @@ static void domain_remove_dev_info(struct dmar_domain *domain);
 
 
 static int dmar_disabled;
 static int dmar_disabled;
 static int __initdata dmar_map_gfx = 1;
 static int __initdata dmar_map_gfx = 1;
+static int dmar_forcedac;
 
 
 #define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))
 #define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))
 static DEFINE_SPINLOCK(device_domain_lock);
 static DEFINE_SPINLOCK(device_domain_lock);
@@ -71,6 +72,10 @@ static int __init intel_iommu_setup(char *str)
 			dmar_map_gfx = 0;
 			dmar_map_gfx = 0;
 			printk(KERN_INFO
 			printk(KERN_INFO
 				"Intel-IOMMU: disable GFX device mapping\n");
 				"Intel-IOMMU: disable GFX device mapping\n");
+		} else if (!strncmp(str, "forcedac", 8)) {
+			printk (KERN_INFO
+				"Intel-IOMMU: Forcing DAC for PCI devices\n");
+			dmar_forcedac = 1;
 		}
 		}
 
 
 		str += strcspn(str, ",");
 		str += strcspn(str, ",");
@@ -1558,7 +1563,7 @@ static dma_addr_t __intel_map_single(struct device *dev, void *addr,
 
 
 	start_addr = IOVA_START_ADDR;
 	start_addr = IOVA_START_ADDR;
 
 
-	if (pdev->dma_mask <= DMA_32BIT_MASK) {
+	if ((pdev->dma_mask <= DMA_32BIT_MASK) || (dmar_forcedac)) {
 		iova = iommu_alloc_iova(domain, addr, size, start_addr,
 		iova = iommu_alloc_iova(domain, addr, size, start_addr,
 			pdev->dma_mask);
 			pdev->dma_mask);
 	} else  {
 	} else  {