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@@ -446,6 +446,43 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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+static int ahci_stop_engine(struct ata_port *ap)
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+{
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+ void __iomem *mmio = ap->host_set->mmio_base;
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+ void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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+ int work;
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+ u32 tmp;
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+
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+ tmp = readl(port_mmio + PORT_CMD);
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+ tmp &= ~PORT_CMD_START;
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+ writel(tmp, port_mmio + PORT_CMD);
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+
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+ /* wait for engine to stop. TODO: this could be
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+ * as long as 500 msec
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+ */
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+ work = 1000;
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+ while (work-- > 0) {
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+ tmp = readl(port_mmio + PORT_CMD);
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+ if ((tmp & PORT_CMD_LIST_ON) == 0)
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+ return 0;
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+ udelay(10);
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+ }
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+
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+ return -EIO;
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+}
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+
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+static void ahci_start_engine(struct ata_port *ap)
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+{
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+ void __iomem *mmio = ap->host_set->mmio_base;
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+ void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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+ u32 tmp;
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+
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+ tmp = readl(port_mmio + PORT_CMD);
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+ tmp |= PORT_CMD_START;
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+ writel(tmp, port_mmio + PORT_CMD);
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+ readl(port_mmio + PORT_CMD); /* flush */
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+}
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+
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static void ahci_phy_reset(struct ata_port *ap)
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{
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void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
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@@ -572,7 +609,6 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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void __iomem *mmio = ap->host_set->mmio_base;
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void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
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u32 tmp;
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- int work;
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if ((ap->device[0].class != ATA_DEV_ATAPI) ||
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((irq_stat & PORT_IRQ_TF_ERR) == 0))
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@@ -588,20 +624,7 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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readl(port_mmio + PORT_SCR_ERR));
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/* stop DMA */
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- tmp = readl(port_mmio + PORT_CMD);
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- tmp &= ~PORT_CMD_START;
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- writel(tmp, port_mmio + PORT_CMD);
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-
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- /* wait for engine to stop. TODO: this could be
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- * as long as 500 msec
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- */
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- work = 1000;
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- while (work-- > 0) {
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- tmp = readl(port_mmio + PORT_CMD);
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- if ((tmp & PORT_CMD_LIST_ON) == 0)
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- break;
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- udelay(10);
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- }
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+ ahci_stop_engine(ap);
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/* clear SATA phy error, if any */
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tmp = readl(port_mmio + PORT_SCR_ERR);
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@@ -620,10 +643,7 @@ static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
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}
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/* re-start DMA */
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- tmp = readl(port_mmio + PORT_CMD);
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- tmp |= PORT_CMD_START;
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- writel(tmp, port_mmio + PORT_CMD);
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- readl(port_mmio + PORT_CMD); /* flush */
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+ ahci_start_engine(ap);
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}
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static void ahci_eng_timeout(struct ata_port *ap)
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