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@@ -7187,13 +7187,14 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
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{
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struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
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volatile u32 int_reg;
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+ volatile u64 maskval;
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ENTER;
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ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
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ipr_init_ioa_mem(ioa_cfg);
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ioa_cfg->allow_interrupts = 1;
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- int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
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+ int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
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if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
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writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
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@@ -7205,9 +7206,12 @@ static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
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/* Enable destructive diagnostics on IOA */
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writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
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- writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
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- if (ioa_cfg->sis64)
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- writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_mask_reg);
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+ if (ioa_cfg->sis64) {
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+ maskval = IPR_PCII_IPL_STAGE_CHANGE;
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+ maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
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+ writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
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+ } else
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+ writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
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int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
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