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+/*
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+ * RTC class driver for "CMOS RTC": PCs, ACPI, etc
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+ *
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+ * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
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+ * Copyright (C) 2006 David Brownell (convert to new framework)
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+
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+/*
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+ * The original "cmos clock" chip was an MC146818 chip, now obsolete.
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+ * That defined the register interface now provided by all PCs, some
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+ * non-PC systems, and incorporated into ACPI. Modern PC chipsets
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+ * integrate an MC146818 clone in their southbridge, and boards use
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+ * that instead of discrete clones like the DS12887 or M48T86. There
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+ * are also clones that connect using the LPC bus.
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+ *
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+ * That register API is also used directly by various other drivers
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+ * (notably for integrated NVRAM), infrastructure (x86 has code to
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+ * bypass the RTC framework, directly reading the RTC during boot
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+ * and updating minutes/seconds for systems using NTP synch) and
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+ * utilities (like userspace 'hwclock', if no /dev node exists).
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+ *
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+ * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
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+ * interrupts disabled, holding the global rtc_lock, to exclude those
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+ * other drivers and utilities on correctly configured systems.
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+ */
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/init.h>
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+#include <linux/interrupt.h>
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+#include <linux/spinlock.h>
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+#include <linux/platform_device.h>
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+#include <linux/mod_devicetable.h>
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+
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+/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
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+#include <asm-generic/rtc.h>
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+
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+
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+struct cmos_rtc {
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+ struct rtc_device *rtc;
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+ struct device *dev;
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+ int irq;
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+ struct resource *iomem;
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+
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+ u8 suspend_ctrl;
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+
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+ /* newer hardware extends the original register set */
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+ u8 day_alrm;
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+ u8 mon_alrm;
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+ u8 century;
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+};
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+
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+/* both platform and pnp busses use negative numbers for invalid irqs */
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+#define is_valid_irq(n) ((n) >= 0)
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+
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+static const char driver_name[] = "rtc_cmos";
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+
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+/*----------------------------------------------------------------*/
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+
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+static int cmos_read_time(struct device *dev, struct rtc_time *t)
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+{
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+ /* REVISIT: if the clock has a "century" register, use
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+ * that instead of the heuristic in get_rtc_time().
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+ * That'll make Y3K compatility (year > 2070) easy!
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+ */
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+ get_rtc_time(t);
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+ return 0;
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+}
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+
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+static int cmos_set_time(struct device *dev, struct rtc_time *t)
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+{
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+ /* REVISIT: set the "century" register if available
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+ *
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+ * NOTE: this ignores the issue whereby updating the seconds
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+ * takes effect exactly 500ms after we write the register.
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+ * (Also queueing and other delays before we get this far.)
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+ */
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+ return set_rtc_time(t);
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+}
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+
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+static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
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+{
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+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
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+ unsigned char rtc_control;
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+
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+ if (!is_valid_irq(cmos->irq))
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+ return -EIO;
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+
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+ /* Basic alarms only support hour, minute, and seconds fields.
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+ * Some also support day and month, for alarms up to a year in
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+ * the future.
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+ */
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+ t->time.tm_mday = -1;
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+ t->time.tm_mon = -1;
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+
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+ spin_lock_irq(&rtc_lock);
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+ t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
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+ t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
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+ t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
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+
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+ if (cmos->day_alrm) {
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+ t->time.tm_mday = CMOS_READ(cmos->day_alrm);
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+ if (!t->time.tm_mday)
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+ t->time.tm_mday = -1;
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+
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+ if (cmos->mon_alrm) {
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+ t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
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+ if (!t->time.tm_mon)
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+ t->time.tm_mon = -1;
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+ }
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+ }
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+
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+ rtc_control = CMOS_READ(RTC_CONTROL);
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+ spin_unlock_irq(&rtc_lock);
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+
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+ /* REVISIT this assumes PC style usage: always BCD */
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+
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+ if (((unsigned)t->time.tm_sec) < 0x60)
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+ t->time.tm_sec = BCD2BIN(t->time.tm_sec);
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+ else
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+ t->time.tm_sec = -1;
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+ if (((unsigned)t->time.tm_min) < 0x60)
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+ t->time.tm_min = BCD2BIN(t->time.tm_min);
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+ else
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+ t->time.tm_min = -1;
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+ if (((unsigned)t->time.tm_hour) < 0x24)
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+ t->time.tm_hour = BCD2BIN(t->time.tm_hour);
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+ else
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+ t->time.tm_hour = -1;
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+
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+ if (cmos->day_alrm) {
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+ if (((unsigned)t->time.tm_mday) <= 0x31)
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+ t->time.tm_mday = BCD2BIN(t->time.tm_mday);
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+ else
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+ t->time.tm_mday = -1;
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+ if (cmos->mon_alrm) {
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+ if (((unsigned)t->time.tm_mon) <= 0x12)
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+ t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
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+ else
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+ t->time.tm_mon = -1;
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+ }
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+ }
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+ t->time.tm_year = -1;
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+
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+ t->enabled = !!(rtc_control & RTC_AIE);
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+ t->pending = 0;
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+
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+ return 0;
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+}
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+
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+static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
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+{
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+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
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+ unsigned char mon, mday, hrs, min, sec;
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+ unsigned char rtc_control, rtc_intr;
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+
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+ if (!is_valid_irq(cmos->irq))
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+ return -EIO;
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+
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+ /* REVISIT this assumes PC style usage: always BCD */
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+
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+ /* Writing 0xff means "don't care" or "match all". */
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+
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+ mon = t->time.tm_mon;
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+ mon = (mon < 12) ? BIN2BCD(mon) : 0xff;
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+ mon++;
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+
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+ mday = t->time.tm_mday;
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+ mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
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+
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+ hrs = t->time.tm_hour;
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+ hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
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+
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+ min = t->time.tm_min;
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+ min = (min < 60) ? BIN2BCD(min) : 0xff;
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+
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+ sec = t->time.tm_sec;
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+ sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
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+
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+ spin_lock_irq(&rtc_lock);
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+
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+ /* next rtc irq must not be from previous alarm setting */
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+ rtc_control = CMOS_READ(RTC_CONTROL);
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+ rtc_control &= ~RTC_AIE;
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+ CMOS_WRITE(rtc_control, RTC_CONTROL);
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+ rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
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+ if (rtc_intr)
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+ rtc_update_irq(&cmos->rtc->class_dev, 1, rtc_intr);
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+
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+ /* update alarm */
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+ CMOS_WRITE(hrs, RTC_HOURS_ALARM);
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+ CMOS_WRITE(min, RTC_MINUTES_ALARM);
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+ CMOS_WRITE(sec, RTC_SECONDS_ALARM);
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+
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+ /* the system may support an "enhanced" alarm */
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+ if (cmos->day_alrm) {
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+ CMOS_WRITE(mday, cmos->day_alrm);
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+ if (cmos->mon_alrm)
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+ CMOS_WRITE(mon, cmos->mon_alrm);
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+ }
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+
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+ if (t->enabled) {
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+ rtc_control |= RTC_AIE;
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+ CMOS_WRITE(rtc_control, RTC_CONTROL);
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+ rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
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+ if (rtc_intr)
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+ rtc_update_irq(&cmos->rtc->class_dev, 1, rtc_intr);
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+ }
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+
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+ spin_unlock_irq(&rtc_lock);
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+
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+ return 0;
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+}
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+
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+static int cmos_set_freq(struct device *dev, int freq)
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+{
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+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
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+ int f;
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+ unsigned long flags;
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+
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+ if (!is_valid_irq(cmos->irq))
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+ return -ENXIO;
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+
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+ /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
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+ f = ffs(freq);
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+ if (f != 0) {
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+ if (f-- > 16 || freq != (1 << f))
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+ return -EINVAL;
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+ f = 16 - f;
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+ }
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+
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+ spin_lock_irqsave(&rtc_lock, flags);
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+ CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
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+ spin_unlock_irqrestore(&rtc_lock, flags);
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+
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+ return 0;
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+}
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+
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+#if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
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+
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+static int
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+cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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+{
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+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
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+ unsigned char rtc_control, rtc_intr;
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+ unsigned long flags;
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+
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+ switch (cmd) {
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+ case RTC_AIE_OFF:
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+ case RTC_AIE_ON:
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+ case RTC_UIE_OFF:
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+ case RTC_UIE_ON:
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+ case RTC_PIE_OFF:
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+ case RTC_PIE_ON:
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+ if (!is_valid_irq(cmos->irq))
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+ return -EINVAL;
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+ break;
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+ default:
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+ return -ENOIOCTLCMD;
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+ }
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+
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+ spin_lock_irqsave(&rtc_lock, flags);
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+ rtc_control = CMOS_READ(RTC_CONTROL);
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+ switch (cmd) {
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+ case RTC_AIE_OFF: /* alarm off */
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+ rtc_control &= ~RTC_AIE;
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+ break;
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+ case RTC_AIE_ON: /* alarm on */
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+ rtc_control |= RTC_AIE;
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+ break;
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+ case RTC_UIE_OFF: /* update off */
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+ rtc_control &= ~RTC_UIE;
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+ break;
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+ case RTC_UIE_ON: /* update on */
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+ rtc_control |= RTC_UIE;
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+ break;
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+ case RTC_PIE_OFF: /* periodic off */
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+ rtc_control &= ~RTC_PIE;
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+ break;
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+ case RTC_PIE_ON: /* periodic on */
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+ rtc_control |= RTC_PIE;
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+ break;
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+ }
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+ CMOS_WRITE(rtc_control, RTC_CONTROL);
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+ rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
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+ if (rtc_intr)
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+ rtc_update_irq(&cmos->rtc->class_dev, 1, rtc_intr);
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+ spin_unlock_irqrestore(&rtc_lock, flags);
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+ return 0;
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+}
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+
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+#else
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+#define cmos_rtc_ioctl NULL
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+#endif
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+
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+#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
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+
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+static int cmos_procfs(struct device *dev, struct seq_file *seq)
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+{
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+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
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+ unsigned char rtc_control, valid;
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+
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+ spin_lock_irq(&rtc_lock);
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+ rtc_control = CMOS_READ(RTC_CONTROL);
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+ valid = CMOS_READ(RTC_VALID);
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+ spin_unlock_irq(&rtc_lock);
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+
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+ /* NOTE: at least ICH6 reports battery status using a different
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+ * (non-RTC) bit; and SQWE is ignored on many current systems.
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+ */
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+ return seq_printf(seq,
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+ "periodic_IRQ\t: %s\n"
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+ "update_IRQ\t: %s\n"
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+ // "square_wave\t: %s\n"
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+ // "BCD\t\t: %s\n"
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+ "DST_enable\t: %s\n"
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+ "periodic_freq\t: %d\n"
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+ "batt_status\t: %s\n",
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+ (rtc_control & RTC_PIE) ? "yes" : "no",
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+ (rtc_control & RTC_UIE) ? "yes" : "no",
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+ // (rtc_control & RTC_SQWE) ? "yes" : "no",
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+ // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
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+ (rtc_control & RTC_DST_EN) ? "yes" : "no",
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+ cmos->rtc->irq_freq,
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+ (valid & RTC_VRT) ? "okay" : "dead");
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+}
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+
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+#else
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+#define cmos_procfs NULL
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+#endif
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+
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+static const struct rtc_class_ops cmos_rtc_ops = {
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+ .ioctl = cmos_rtc_ioctl,
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+ .read_time = cmos_read_time,
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+ .set_time = cmos_set_time,
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+ .read_alarm = cmos_read_alarm,
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+ .set_alarm = cmos_set_alarm,
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+ .proc = cmos_procfs,
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+ .irq_set_freq = cmos_set_freq,
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+};
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+
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+/*----------------------------------------------------------------*/
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+
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+static struct cmos_rtc cmos_rtc;
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+
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+static irqreturn_t cmos_interrupt(int irq, void *p)
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+{
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+ u8 irqstat;
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+
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+ spin_lock(&rtc_lock);
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+ irqstat = CMOS_READ(RTC_INTR_FLAGS);
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+ spin_unlock(&rtc_lock);
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+
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+ if (irqstat) {
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+ /* NOTE: irqstat may have e.g. RTC_PF set
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+ * even when RTC_PIE is clear...
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+ */
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+ rtc_update_irq(p, 1, irqstat);
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+ return IRQ_HANDLED;
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+ } else
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+ return IRQ_NONE;
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+}
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+
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+#ifdef CONFIG_PNPACPI
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+#define is_pnpacpi() 1
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+#define INITSECTION
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+
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+#else
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+#define is_pnpacpi() 0
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+#define INITSECTION __init
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+#endif
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+
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+static int INITSECTION
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+cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
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+{
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+ struct cmos_rtc_board_info *info = dev->platform_data;
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+ int retval = 0;
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+ unsigned char rtc_control;
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+
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+ /* there can be only one ... */
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+ if (cmos_rtc.dev)
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+ return -EBUSY;
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+
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+ if (!ports)
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+ return -ENODEV;
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+
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+ cmos_rtc.irq = rtc_irq;
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+ cmos_rtc.iomem = ports;
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+
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+ /* For ACPI systems the info comes from the FADT. On others,
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+ * board specific setup provides it as appropriate.
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+ */
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+ if (info) {
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+ cmos_rtc.day_alrm = info->rtc_day_alarm;
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|
+ cmos_rtc.mon_alrm = info->rtc_mon_alarm;
|
|
|
+ cmos_rtc.century = info->rtc_century;
|
|
|
+ }
|
|
|
+
|
|
|
+ cmos_rtc.rtc = rtc_device_register(driver_name, dev,
|
|
|
+ &cmos_rtc_ops, THIS_MODULE);
|
|
|
+ if (IS_ERR(cmos_rtc.rtc))
|
|
|
+ return PTR_ERR(cmos_rtc.rtc);
|
|
|
+
|
|
|
+ cmos_rtc.dev = dev;
|
|
|
+ dev_set_drvdata(dev, &cmos_rtc);
|
|
|
+
|
|
|
+ /* platform and pnp busses handle resources incompatibly.
|
|
|
+ *
|
|
|
+ * REVISIT for non-x86 systems we may need to handle io memory
|
|
|
+ * resources: ioremap them, and request_mem_region().
|
|
|
+ */
|
|
|
+ if (is_pnpacpi()) {
|
|
|
+ retval = request_resource(&ioport_resource, ports);
|
|
|
+ if (retval < 0) {
|
|
|
+ dev_dbg(dev, "i/o registers already in use\n");
|
|
|
+ goto cleanup0;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ rename_region(ports, cmos_rtc.rtc->class_dev.class_id);
|
|
|
+
|
|
|
+ spin_lock_irq(&rtc_lock);
|
|
|
+
|
|
|
+ /* force periodic irq to CMOS reset default of 1024Hz;
|
|
|
+ *
|
|
|
+ * REVISIT it's been reported that at least one x86_64 ALI mobo
|
|
|
+ * doesn't use 32KHz here ... for portability we might need to
|
|
|
+ * do something about other clock frequencies.
|
|
|
+ */
|
|
|
+ CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
|
|
|
+ cmos_rtc.rtc->irq_freq = 1024;
|
|
|
+
|
|
|
+ /* disable irqs.
|
|
|
+ *
|
|
|
+ * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
|
|
|
+ * allegedly some older rtcs need that to handle irqs properly
|
|
|
+ */
|
|
|
+ rtc_control = CMOS_READ(RTC_CONTROL);
|
|
|
+ rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
|
|
|
+ CMOS_WRITE(rtc_control, RTC_CONTROL);
|
|
|
+ CMOS_READ(RTC_INTR_FLAGS);
|
|
|
+
|
|
|
+ spin_unlock_irq(&rtc_lock);
|
|
|
+
|
|
|
+ /* FIXME teach the alarm code how to handle binary mode;
|
|
|
+ * <asm-generic/rtc.h> doesn't know 12-hour mode either.
|
|
|
+ */
|
|
|
+ if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
|
|
|
+ dev_dbg(dev, "only 24-hr BCD mode supported\n");
|
|
|
+ retval = -ENXIO;
|
|
|
+ goto cleanup1;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (is_valid_irq(rtc_irq))
|
|
|
+ retval = request_irq(rtc_irq, cmos_interrupt, IRQF_DISABLED,
|
|
|
+ cmos_rtc.rtc->class_dev.class_id,
|
|
|
+ &cmos_rtc.rtc->class_dev);
|
|
|
+ if (retval < 0) {
|
|
|
+ dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
|
|
|
+ goto cleanup1;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* REVISIT optionally make 50 or 114 bytes NVRAM available,
|
|
|
+ * like rtc-ds1553, rtc-ds1742 ... this will often include
|
|
|
+ * registers for century, and day/month alarm.
|
|
|
+ */
|
|
|
+
|
|
|
+ pr_info("%s: alarms up to one %s%s\n",
|
|
|
+ cmos_rtc.rtc->class_dev.class_id,
|
|
|
+ is_valid_irq(rtc_irq)
|
|
|
+ ? (cmos_rtc.mon_alrm
|
|
|
+ ? "year"
|
|
|
+ : (cmos_rtc.day_alrm
|
|
|
+ ? "month" : "day"))
|
|
|
+ : "no",
|
|
|
+ cmos_rtc.century ? ", y3k" : ""
|
|
|
+ );
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+cleanup1:
|
|
|
+ rename_region(ports, NULL);
|
|
|
+cleanup0:
|
|
|
+ rtc_device_unregister(cmos_rtc.rtc);
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+
|
|
|
+static void cmos_do_shutdown(void)
|
|
|
+{
|
|
|
+ unsigned char rtc_control;
|
|
|
+
|
|
|
+ spin_lock_irq(&rtc_lock);
|
|
|
+ rtc_control = CMOS_READ(RTC_CONTROL);
|
|
|
+ rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
|
|
|
+ CMOS_WRITE(rtc_control, RTC_CONTROL);
|
|
|
+ CMOS_READ(RTC_INTR_FLAGS);
|
|
|
+ spin_unlock_irq(&rtc_lock);
|
|
|
+}
|
|
|
+
|
|
|
+static void __exit cmos_do_remove(struct device *dev)
|
|
|
+{
|
|
|
+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
|
|
+
|
|
|
+ cmos_do_shutdown();
|
|
|
+
|
|
|
+ if (is_pnpacpi())
|
|
|
+ release_resource(cmos->iomem);
|
|
|
+ rename_region(cmos->iomem, NULL);
|
|
|
+
|
|
|
+ if (is_valid_irq(cmos->irq))
|
|
|
+ free_irq(cmos->irq, &cmos_rtc.rtc->class_dev);
|
|
|
+
|
|
|
+ rtc_device_unregister(cmos_rtc.rtc);
|
|
|
+
|
|
|
+ cmos_rtc.dev = NULL;
|
|
|
+ dev_set_drvdata(dev, NULL);
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+
|
|
|
+static int cmos_suspend(struct device *dev, pm_message_t mesg)
|
|
|
+{
|
|
|
+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
|
|
+ int do_wake = device_may_wakeup(dev);
|
|
|
+ unsigned char tmp, irqstat;
|
|
|
+
|
|
|
+ /* only the alarm might be a wakeup event source */
|
|
|
+ spin_lock_irq(&rtc_lock);
|
|
|
+ cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
|
|
|
+ if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
|
|
|
+ if (do_wake)
|
|
|
+ tmp &= ~(RTC_PIE|RTC_UIE);
|
|
|
+ else
|
|
|
+ tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
|
|
|
+ CMOS_WRITE(tmp, RTC_CONTROL);
|
|
|
+ irqstat = CMOS_READ(RTC_INTR_FLAGS);
|
|
|
+ } else
|
|
|
+ irqstat = 0;
|
|
|
+ spin_unlock_irq(&rtc_lock);
|
|
|
+
|
|
|
+ if (irqstat)
|
|
|
+ rtc_update_irq(&cmos->rtc->class_dev, 1, irqstat);
|
|
|
+
|
|
|
+ /* ACPI HOOK: enable ACPI_EVENT_RTC when (tmp & RTC_AIE)
|
|
|
+ * ... it'd be best if we could do that under rtc_lock.
|
|
|
+ */
|
|
|
+
|
|
|
+ pr_debug("%s: suspend%s, ctrl %02x\n",
|
|
|
+ cmos_rtc.rtc->class_dev.class_id,
|
|
|
+ (tmp & RTC_AIE) ? ", alarm may wake" : "",
|
|
|
+ tmp);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int cmos_resume(struct device *dev)
|
|
|
+{
|
|
|
+ struct cmos_rtc *cmos = dev_get_drvdata(dev);
|
|
|
+ unsigned char tmp = cmos->suspend_ctrl;
|
|
|
+
|
|
|
+ /* REVISIT: a mechanism to resync the system clock (jiffies)
|
|
|
+ * on resume should be portable between platforms ...
|
|
|
+ */
|
|
|
+
|
|
|
+ /* re-enable any irqs previously active */
|
|
|
+ if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
|
|
|
+
|
|
|
+ /* ACPI HOOK: disable ACPI_EVENT_RTC when (tmp & RTC_AIE) */
|
|
|
+
|
|
|
+ spin_lock_irq(&rtc_lock);
|
|
|
+ CMOS_WRITE(tmp, RTC_CONTROL);
|
|
|
+ tmp = CMOS_READ(RTC_INTR_FLAGS);
|
|
|
+ spin_unlock_irq(&rtc_lock);
|
|
|
+ if (tmp)
|
|
|
+ rtc_update_irq(&cmos->rtc->class_dev, 1, tmp);
|
|
|
+ }
|
|
|
+
|
|
|
+ pr_debug("%s: resume, ctrl %02x\n",
|
|
|
+ cmos_rtc.rtc->class_dev.class_id,
|
|
|
+ cmos->suspend_ctrl);
|
|
|
+
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+#else
|
|
|
+#define cmos_suspend NULL
|
|
|
+#define cmos_resume NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+/*----------------------------------------------------------------*/
|
|
|
+
|
|
|
+/* The "CMOS" RTC normally lives on the platform_bus. On ACPI systems,
|
|
|
+ * the device node may alternatively be created as a PNP device.
|
|
|
+ */
|
|
|
+
|
|
|
+#ifdef CONFIG_PNPACPI
|
|
|
+
|
|
|
+#include <linux/pnp.h>
|
|
|
+
|
|
|
+static int __devinit
|
|
|
+cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
|
|
|
+{
|
|
|
+ /* REVISIT paranoia argues for a shutdown notifier, since PNP
|
|
|
+ * drivers can't provide shutdown() methods to disable IRQs.
|
|
|
+ * Or better yet, fix PNP to allow those methods...
|
|
|
+ */
|
|
|
+ return cmos_do_probe(&pnp->dev,
|
|
|
+ &pnp->res.port_resource[0],
|
|
|
+ pnp->res.irq_resource[0].start);
|
|
|
+}
|
|
|
+
|
|
|
+static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
|
|
|
+{
|
|
|
+ cmos_do_remove(&pnp->dev);
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+
|
|
|
+static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
|
|
|
+{
|
|
|
+ return cmos_suspend(&pnp->dev, mesg);
|
|
|
+}
|
|
|
+
|
|
|
+static int cmos_pnp_resume(struct pnp_dev *pnp)
|
|
|
+{
|
|
|
+ return cmos_resume(&pnp->dev);
|
|
|
+}
|
|
|
+
|
|
|
+#else
|
|
|
+#define cmos_pnp_suspend NULL
|
|
|
+#define cmos_pnp_resume NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+
|
|
|
+static const struct pnp_device_id rtc_ids[] = {
|
|
|
+ { .id = "PNP0b00", },
|
|
|
+ { .id = "PNP0b01", },
|
|
|
+ { .id = "PNP0b02", },
|
|
|
+ { },
|
|
|
+};
|
|
|
+MODULE_DEVICE_TABLE(pnp, rtc_ids);
|
|
|
+
|
|
|
+static struct pnp_driver cmos_pnp_driver = {
|
|
|
+ .name = (char *) driver_name,
|
|
|
+ .id_table = rtc_ids,
|
|
|
+ .probe = cmos_pnp_probe,
|
|
|
+ .remove = __exit_p(cmos_pnp_remove),
|
|
|
+
|
|
|
+ /* flag ensures resume() gets called, and stops syslog spam */
|
|
|
+ .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
|
|
|
+ .suspend = cmos_pnp_suspend,
|
|
|
+ .resume = cmos_pnp_resume,
|
|
|
+};
|
|
|
+
|
|
|
+static int __init cmos_init(void)
|
|
|
+{
|
|
|
+ return pnp_register_driver(&cmos_pnp_driver);
|
|
|
+}
|
|
|
+module_init(cmos_init);
|
|
|
+
|
|
|
+static void __exit cmos_exit(void)
|
|
|
+{
|
|
|
+ pnp_unregister_driver(&cmos_pnp_driver);
|
|
|
+}
|
|
|
+module_exit(cmos_exit);
|
|
|
+
|
|
|
+#else /* no PNPACPI */
|
|
|
+
|
|
|
+/*----------------------------------------------------------------*/
|
|
|
+
|
|
|
+/* Platform setup should have set up an RTC device, when PNPACPI is
|
|
|
+ * unavailable ... this is the normal case, common even on PCs.
|
|
|
+ */
|
|
|
+
|
|
|
+static int __init cmos_platform_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ return cmos_do_probe(&pdev->dev,
|
|
|
+ platform_get_resource(pdev, IORESOURCE_IO, 0),
|
|
|
+ platform_get_irq(pdev, 0));
|
|
|
+}
|
|
|
+
|
|
|
+static int __exit cmos_platform_remove(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ cmos_do_remove(&pdev->dev);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void cmos_platform_shutdown(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ cmos_do_shutdown();
|
|
|
+}
|
|
|
+
|
|
|
+static struct platform_driver cmos_platform_driver = {
|
|
|
+ .remove = __exit_p(cmos_platform_remove),
|
|
|
+ .shutdown = cmos_platform_shutdown,
|
|
|
+ .driver = {
|
|
|
+ .name = (char *) driver_name,
|
|
|
+ .suspend = cmos_suspend,
|
|
|
+ .resume = cmos_resume,
|
|
|
+ }
|
|
|
+};
|
|
|
+
|
|
|
+static int __init cmos_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_probe(&cmos_platform_driver,
|
|
|
+ cmos_platform_probe);
|
|
|
+}
|
|
|
+module_init(cmos_init);
|
|
|
+
|
|
|
+static void __exit cmos_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&cmos_platform_driver);
|
|
|
+}
|
|
|
+module_exit(cmos_exit);
|
|
|
+
|
|
|
+
|
|
|
+#endif /* !PNPACPI */
|
|
|
+
|
|
|
+MODULE_AUTHOR("David Brownell");
|
|
|
+MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
|
|
|
+MODULE_LICENSE("GPL");
|