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@@ -160,8 +160,8 @@ NOTE: Only ONE of the three must be enabled
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* 3:2 Rank 1 architecture
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* 1:0 Rank 0 architecture
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*
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- * 00 => x16 devices; i.e 4 banks
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- * 01 => x8 devices; i.e 8 banks
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+ * 00 => 4 banks
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+ * 01 => 8 banks
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*/
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#define I82975X_C0BNKARC 0x10e
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#define I82975X_C1BNKARC 0x18e
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@@ -344,11 +344,7 @@ static int dual_channel_active(void __iomem *mch_window)
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static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank)
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{
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/*
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- * ASUS P5W DH either does not program this register or programs
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- * it wrong!
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- * ECC is possible on i92975x ONLY with DEV_X8 which should mean 'val'
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- * for each rank should be 01b - the LSB of the word should be 0x55;
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- * but it reads 0!
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+ * ECC is possible on i92975x ONLY with DEV_X8
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*/
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return DEV_X8;
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}
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