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@@ -108,6 +108,9 @@ static void clk_pll_enable_lock(struct tegra_clk_pll *pll)
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if (!(pll->flags & TEGRA_PLL_USE_LOCK))
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return;
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+ if (!(pll->flags & TEGRA_PLL_HAS_LOCK_ENABLE))
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+ return;
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+
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val = pll_readl_misc(pll);
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val |= BIT(pll->params->lock_enable_bit_idx);
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pll_writel_misc(val, pll);
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@@ -675,6 +678,7 @@ struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
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struct clk *clk;
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pll_flags |= TEGRA_PLL_BYPASS;
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+ pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
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pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
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freq_table, lock);
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if (IS_ERR(pll))
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@@ -698,6 +702,7 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
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struct clk *clk;
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pll_flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
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+ pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
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pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags,
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freq_table, lock);
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if (IS_ERR(pll))
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