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@@ -293,12 +293,14 @@ static u32 unresettable_controller[] = {
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0x3215103C, /* Smart Array E200i */
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0x3237103C, /* Smart Array E500 */
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0x323D103C, /* Smart Array P700m */
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+ 0x40800E11, /* Smart Array 5i */
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0x409C0E11, /* Smart Array 6400 */
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0x409D0E11, /* Smart Array 6400 EM */
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};
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/* List of controllers which cannot even be soft reset */
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static u32 soft_unresettable_controller[] = {
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+ 0x40800E11, /* Smart Array 5i */
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/* Exclude 640x boards. These are two pci devices in one slot
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* which share a battery backed cache module. One controls the
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* cache, the other accesses the cache through the one that controls
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