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@@ -11,7 +11,10 @@
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* GNU General Public License for more details.
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*/
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-/include/ "skeleton.dtsi"
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+
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+#include "skeleton.dtsi"
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/ {
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model = "BCM11351 SoC";
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@@ -33,7 +36,7 @@
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smc@0x3404c000 {
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compatible = "bcm,bcm11351-smc", "bcm,kona-smc";
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- reg = <0x3404c000 0x400>; //1 KiB in SRAM
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+ reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
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};
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uart@3e000000 {
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@@ -41,7 +44,7 @@
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status = "disabled";
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reg = <0x3e000000 0x1000>;
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clock-frequency = <13000000>;
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- interrupts = <0x0 67 0x4>;
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+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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@@ -56,8 +59,36 @@
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timer@35006000 {
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compatible = "bcm,kona-timer";
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reg = <0x35006000 0x1000>;
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- interrupts = <0x0 7 0x4>;
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+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <32768>;
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};
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+ sdio0: sdio@0x3f180000 {
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+ compatible = "bcm,kona-sdhci";
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+ reg = <0x3f180000 0x10000>;
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+ interrupts = <0x0 77 0x4>;
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+ status = "disabled";
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+ };
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+
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+ sdio1: sdio@0x3f190000 {
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+ compatible = "bcm,kona-sdhci";
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+ reg = <0x3f190000 0x10000>;
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+ interrupts = <0x0 76 0x4>;
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+ status = "disabled";
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+ };
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+
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+ sdio2: sdio@0x3f1a0000 {
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+ compatible = "bcm,kona-sdhci";
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+ reg = <0x3f1a0000 0x10000>;
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+ interrupts = <0x0 74 0x4>;
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+ status = "disabled";
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+ };
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+
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+ sdio3: sdio@0x3f1b0000 {
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+ compatible = "bcm,kona-sdhci";
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+ reg = <0x3f1b0000 0x10000>;
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+ interrupts = <0x0 73 0x4>;
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+ status = "disabled";
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+ };
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+
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};
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