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@@ -1491,6 +1491,69 @@ err_request_mem:
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}
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#ifdef CONFIG_PM
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+struct lcdc_context {
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+ u32 clk_enable;
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+ u32 ctrl;
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+ u32 dma_ctrl;
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+ u32 raster_timing_0;
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+ u32 raster_timing_1;
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+ u32 raster_timing_2;
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+ u32 int_enable_set;
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+ u32 dma_frm_buf_base_addr_0;
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+ u32 dma_frm_buf_ceiling_addr_0;
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+ u32 dma_frm_buf_base_addr_1;
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+ u32 dma_frm_buf_ceiling_addr_1;
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+ u32 raster_ctrl;
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+} reg_context;
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+
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+static void lcd_context_save(void)
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+{
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+ if (lcd_revision == LCD_VERSION_2) {
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+ reg_context.clk_enable = lcdc_read(LCD_CLK_ENABLE_REG);
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+ reg_context.int_enable_set = lcdc_read(LCD_INT_ENABLE_SET_REG);
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+ }
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+
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+ reg_context.ctrl = lcdc_read(LCD_CTRL_REG);
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+ reg_context.dma_ctrl = lcdc_read(LCD_DMA_CTRL_REG);
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+ reg_context.raster_timing_0 = lcdc_read(LCD_RASTER_TIMING_0_REG);
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+ reg_context.raster_timing_1 = lcdc_read(LCD_RASTER_TIMING_1_REG);
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+ reg_context.raster_timing_2 = lcdc_read(LCD_RASTER_TIMING_2_REG);
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+ reg_context.dma_frm_buf_base_addr_0 =
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+ lcdc_read(LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);
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+ reg_context.dma_frm_buf_ceiling_addr_0 =
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+ lcdc_read(LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);
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+ reg_context.dma_frm_buf_base_addr_1 =
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+ lcdc_read(LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);
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+ reg_context.dma_frm_buf_ceiling_addr_1 =
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+ lcdc_read(LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);
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+ reg_context.raster_ctrl = lcdc_read(LCD_RASTER_CTRL_REG);
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+ return;
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+}
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+
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+static void lcd_context_restore(void)
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+{
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+ if (lcd_revision == LCD_VERSION_2) {
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+ lcdc_write(reg_context.clk_enable, LCD_CLK_ENABLE_REG);
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+ lcdc_write(reg_context.int_enable_set, LCD_INT_ENABLE_SET_REG);
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+ }
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+
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+ lcdc_write(reg_context.ctrl, LCD_CTRL_REG);
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+ lcdc_write(reg_context.dma_ctrl, LCD_DMA_CTRL_REG);
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+ lcdc_write(reg_context.raster_timing_0, LCD_RASTER_TIMING_0_REG);
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+ lcdc_write(reg_context.raster_timing_1, LCD_RASTER_TIMING_1_REG);
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+ lcdc_write(reg_context.raster_timing_2, LCD_RASTER_TIMING_2_REG);
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+ lcdc_write(reg_context.dma_frm_buf_base_addr_0,
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+ LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);
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+ lcdc_write(reg_context.dma_frm_buf_ceiling_addr_0,
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+ LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);
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+ lcdc_write(reg_context.dma_frm_buf_base_addr_1,
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+ LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);
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+ lcdc_write(reg_context.dma_frm_buf_ceiling_addr_1,
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+ LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);
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+ lcdc_write(reg_context.raster_ctrl, LCD_RASTER_CTRL_REG);
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+ return;
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+}
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+
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static int fb_suspend(struct platform_device *dev, pm_message_t state)
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{
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struct fb_info *info = platform_get_drvdata(dev);
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@@ -1502,6 +1565,7 @@ static int fb_suspend(struct platform_device *dev, pm_message_t state)
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fb_set_suspend(info, 1);
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lcd_disable_raster(true);
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+ lcd_context_save();
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pm_runtime_put_sync(&dev->dev);
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console_unlock();
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@@ -1514,6 +1578,7 @@ static int fb_resume(struct platform_device *dev)
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console_lock();
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pm_runtime_get_sync(&dev->dev);
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+ lcd_context_restore();
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if (par->blank == FB_BLANK_UNBLANK) {
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lcd_enable_raster();
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