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@@ -996,7 +996,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action)
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break;
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case ABORT_DEVICE:
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- ha->flags.in_reset = 1;
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if (qla1280_verbose)
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printk(KERN_INFO
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"scsi(%ld:%d:%d:%d): Queueing abort device "
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@@ -1010,7 +1009,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action)
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printk(KERN_INFO
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"scsi(%ld:%d:%d:%d): Queueing device reset "
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"command.\n", ha->host_no, bus, target, lun);
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- ha->flags.in_reset = 1;
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if (qla1280_device_reset(ha, bus, target) == 0)
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result = SUCCESS;
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break;
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@@ -1019,7 +1017,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action)
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if (qla1280_verbose)
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printk(KERN_INFO "qla1280(%ld:%d): Issuing BUS "
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"DEVICE RESET\n", ha->host_no, bus);
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- ha->flags.in_reset = 1;
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if (qla1280_bus_reset(ha, bus == 0))
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result = SUCCESS;
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@@ -1047,7 +1044,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action)
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if (!list_empty(&ha->done_q))
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qla1280_done(ha);
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- ha->flags.in_reset = 0;
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/* If we didn't manage to issue the action, or we have no
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* command to wait for, exit here */
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@@ -1269,6 +1265,22 @@ qla1280_biosparam_old(Disk * disk, kdev_t dev, int geom[])
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return qla1280_biosparam(disk->device, NULL, disk->capacity, geom);
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}
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#endif
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+
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+/* disable risc and host interrupts */
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+static inline void
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+qla1280_disable_intrs(struct scsi_qla_host *ha)
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+{
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+ WRT_REG_WORD(&ha->iobase->ictrl, 0);
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+ RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */
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+}
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+
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+/* enable risc and host interrupts */
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+static inline void
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+qla1280_enable_intrs(struct scsi_qla_host *ha)
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+{
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+ WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC));
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+ RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */
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+}
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/**************************************************************************
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* qla1280_intr_handler
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@@ -1290,7 +1302,7 @@ qla1280_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
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ha->isr_count++;
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reg = ha->iobase;
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- WRT_REG_WORD(®->ictrl, 0); /* disable our interrupt. */
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+ qla1280_disable_intrs(ha);
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data = qla1280_debounce_register(®->istatus);
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/* Check for pending interrupts. */
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@@ -1303,8 +1315,7 @@ qla1280_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
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spin_unlock(HOST_LOCK);
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- /* enable our interrupt. */
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- WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC));
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+ qla1280_enable_intrs(ha);
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LEAVE_INTR("qla1280_intr_handler");
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return IRQ_RETVAL(handled);
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@@ -1317,7 +1328,7 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target)
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uint8_t mr;
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uint16_t mb[MAILBOX_REGISTER_COUNT];
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struct nvram *nv;
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- int status;
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+ int status, lun;
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nv = &ha->nvram;
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@@ -1325,24 +1336,38 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target)
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/* Set Target Parameters. */
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mb[0] = MBC_SET_TARGET_PARAMETERS;
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- mb[1] = (uint16_t) (bus ? target | BIT_7 : target);
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- mb[1] <<= 8;
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-
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- mb[2] = (nv->bus[bus].target[target].parameter.c << 8);
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+ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
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+ mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8;
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+ mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9;
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+ mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10;
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+ mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11;
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+ mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12;
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+ mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13;
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+ mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14;
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+ mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15;
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if (IS_ISP1x160(ha)) {
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mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5;
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- mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8) |
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- nv->bus[bus].target[target].sync_period;
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+ mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8);
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mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) |
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nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width;
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mr |= BIT_6;
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} else {
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- mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8) |
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- nv->bus[bus].target[target].sync_period;
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+ mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8);
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}
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+ mb[3] |= nv->bus[bus].target[target].sync_period;
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- status = qla1280_mailbox_command(ha, mr, &mb[0]);
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+ status = qla1280_mailbox_command(ha, mr, mb);
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+
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+ /* Set Device Queue Parameters. */
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+ for (lun = 0; lun < MAX_LUNS; lun++) {
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+ mb[0] = MBC_SET_DEVICE_QUEUE;
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+ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
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+ mb[1] |= lun;
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+ mb[2] = nv->bus[bus].max_queue_depth;
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+ mb[3] = nv->bus[bus].target[target].execution_throttle;
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+ status |= qla1280_mailbox_command(ha, 0x0f, mb);
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+ }
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if (status)
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printk(KERN_WARNING "scsi(%ld:%i:%i): "
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@@ -1389,19 +1414,19 @@ qla1280_slave_configure(struct scsi_device *device)
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}
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#if LINUX_VERSION_CODE > 0x020500
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- nv->bus[bus].target[target].parameter.f.enable_sync = device->sdtr;
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- nv->bus[bus].target[target].parameter.f.enable_wide = device->wdtr;
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+ nv->bus[bus].target[target].parameter.enable_sync = device->sdtr;
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+ nv->bus[bus].target[target].parameter.enable_wide = device->wdtr;
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nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr;
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#endif
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if (driver_setup.no_sync ||
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(driver_setup.sync_mask &&
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(~driver_setup.sync_mask & (1 << target))))
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- nv->bus[bus].target[target].parameter.f.enable_sync = 0;
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+ nv->bus[bus].target[target].parameter.enable_sync = 0;
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if (driver_setup.no_wide ||
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(driver_setup.wide_mask &&
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(~driver_setup.wide_mask & (1 << target))))
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- nv->bus[bus].target[target].parameter.f.enable_wide = 0;
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+ nv->bus[bus].target[target].parameter.enable_wide = 0;
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if (IS_ISP1x160(ha)) {
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if (driver_setup.no_ppr ||
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(driver_setup.ppr_mask &&
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@@ -1410,7 +1435,7 @@ qla1280_slave_configure(struct scsi_device *device)
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}
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spin_lock_irqsave(HOST_LOCK, flags);
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- if (nv->bus[bus].target[target].parameter.f.enable_sync)
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+ if (nv->bus[bus].target[target].parameter.enable_sync)
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status = qla1280_set_target_parameters(ha, bus, target);
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qla1280_get_target_parameters(ha, device);
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spin_unlock_irqrestore(HOST_LOCK, flags);
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@@ -1448,7 +1473,6 @@ qla1280_select_queue_depth(struct Scsi_Host *host, struct scsi_device *sdev_q)
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*
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* Input:
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* ha = adapter block pointer.
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- * done_q = done queue.
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*/
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static void
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qla1280_done(struct scsi_qla_host *ha)
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@@ -1522,7 +1546,7 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp)
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int host_status = DID_ERROR;
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uint16_t comp_status = le16_to_cpu(sts->comp_status);
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uint16_t state_flags = le16_to_cpu(sts->state_flags);
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- uint16_t residual_length = le16_to_cpu(sts->residual_length);
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+ uint16_t residual_length = le32_to_cpu(sts->residual_length);
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uint16_t scsi_status = le16_to_cpu(sts->scsi_status);
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#if DEBUG_QLA1280_INTR
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static char *reason[] = {
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@@ -1582,7 +1606,7 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp)
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case CS_DATA_OVERRUN:
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dprintk(2, "Data overrun 0x%x\n", residual_length);
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- dprintk(2, "qla1280_isr: response packet data\n");
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+ dprintk(2, "qla1280_return_status: response packet data\n");
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qla1280_dump_buffer(2, (char *)sts, RESPONSE_ENTRY_SIZE);
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host_status = DID_ERROR;
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break;
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@@ -1617,40 +1641,6 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp)
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/* QLogic ISP1280 Hardware Support Functions. */
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/****************************************************************************/
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- /*
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- * qla2100_enable_intrs
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- * qla2100_disable_intrs
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- *
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- * Input:
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- * ha = adapter block pointer.
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- *
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- * Returns:
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- * None
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- */
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-static inline void
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-qla1280_enable_intrs(struct scsi_qla_host *ha)
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-{
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- struct device_reg __iomem *reg;
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-
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- reg = ha->iobase;
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- /* enable risc and host interrupts */
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- WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC));
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- RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */
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- ha->flags.ints_enabled = 1;
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-}
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-
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-static inline void
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-qla1280_disable_intrs(struct scsi_qla_host *ha)
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-{
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- struct device_reg __iomem *reg;
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-
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- reg = ha->iobase;
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- /* disable risc and host interrupts */
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- WRT_REG_WORD(®->ictrl, 0);
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- RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */
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- ha->flags.ints_enabled = 0;
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-}
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-
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/*
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* qla1280_initialize_adapter
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* Initialize board.
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@@ -1679,7 +1669,6 @@ qla1280_initialize_adapter(struct scsi_qla_host *ha)
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ha->flags.reset_active = 0;
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ha->flags.abort_isp_active = 0;
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- ha->flags.ints_enabled = 0;
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#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
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if (ia64_platform_is("sn2")) {
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printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
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@@ -1758,69 +1747,6 @@ qla1280_initialize_adapter(struct scsi_qla_host *ha)
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return status;
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}
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-
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-/*
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- * ISP Firmware Test
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- * Checks if present version of RISC firmware is older than
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- * driver firmware.
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- *
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- * Input:
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- * ha = adapter block pointer.
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- *
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- * Returns:
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- * 0 = firmware does not need to be loaded.
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- */
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-static int
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-qla1280_isp_firmware(struct scsi_qla_host *ha)
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-{
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- struct nvram *nv = (struct nvram *) ha->response_ring;
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- int status = 0; /* dg 2/27 always loads RISC */
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- uint16_t mb[MAILBOX_REGISTER_COUNT];
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-
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- ENTER("qla1280_isp_firmware");
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-
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- dprintk(1, "scsi(%li): Determining if RISC is loaded\n", ha->host_no);
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-
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- /* Bad NVRAM data, load RISC code. */
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- if (!ha->nvram_valid) {
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- ha->flags.disable_risc_code_load = 0;
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- } else
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- ha->flags.disable_risc_code_load =
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- nv->cntr_flags_1.disable_loading_risc_code;
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-
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- if (ha->flags.disable_risc_code_load) {
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- dprintk(3, "qla1280_isp_firmware: Telling RISC to verify "
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- "checksum of loaded BIOS code.\n");
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-
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- /* Verify checksum of loaded RISC code. */
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- mb[0] = MBC_VERIFY_CHECKSUM;
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- /* mb[1] = ql12_risc_code_addr01; */
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- mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
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-
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- if (!(status =
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- qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) {
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- /* Start firmware execution. */
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- dprintk(3, "qla1280_isp_firmware: Startng F/W "
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- "execution.\n");
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-
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- mb[0] = MBC_EXECUTE_FIRMWARE;
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- /* mb[1] = ql12_risc_code_addr01; */
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- mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
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- qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
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- } else
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- printk(KERN_INFO "qla1280: RISC checksum failed.\n");
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- } else {
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- dprintk(1, "qla1280: NVRAM configured to load RISC load.\n");
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- status = 1;
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- }
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-
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- if (status)
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- dprintk(2, "qla1280_isp_firmware: **** Load RISC code ****\n");
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-
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- LEAVE("qla1280_isp_firmware");
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- return status;
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-}
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-
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/*
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* Chip diagnostics
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* Test chip for proper operation.
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@@ -2006,7 +1932,7 @@ qla1280_load_firmware_dma(struct scsi_qla_host *ha)
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"%d,%d(0x%x)\n",
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risc_code_address, cnt, num, risc_address);
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for(i = 0; i < cnt; i++)
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- ((uint16_t *)ha->request_ring)[i] =
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+ ((__le16 *)ha->request_ring)[i] =
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cpu_to_le16(risc_code_address[i]);
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mb[0] = MBC_LOAD_RAM;
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@@ -2085,7 +2011,7 @@ qla1280_start_firmware(struct scsi_qla_host *ha)
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mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
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err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
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if (err) {
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- printk(KERN_ERR "scsi(%li): Failed checksum\n", ha->host_no);
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+ printk(KERN_ERR "scsi(%li): RISC checksum failed.\n", ha->host_no);
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return err;
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}
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@@ -2105,14 +2031,7 @@ qla1280_start_firmware(struct scsi_qla_host *ha)
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static int
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qla1280_load_firmware(struct scsi_qla_host *ha)
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{
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- int err = -ENODEV;
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-
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- /* If firmware needs to be loaded */
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- if (!qla1280_isp_firmware(ha)) {
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- printk(KERN_ERR "scsi(%li): isp_firmware() failed!\n",
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- ha->host_no);
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- goto out;
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- }
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+ int err;
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err = qla1280_chip_diag(ha);
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if (err)
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@@ -2246,17 +2165,17 @@ qla1280_set_target_defaults(struct scsi_qla_host *ha, int bus, int target)
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{
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struct nvram *nv = &ha->nvram;
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- nv->bus[bus].target[target].parameter.f.renegotiate_on_error = 1;
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- nv->bus[bus].target[target].parameter.f.auto_request_sense = 1;
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- nv->bus[bus].target[target].parameter.f.tag_queuing = 1;
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- nv->bus[bus].target[target].parameter.f.enable_sync = 1;
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+ nv->bus[bus].target[target].parameter.renegotiate_on_error = 1;
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+ nv->bus[bus].target[target].parameter.auto_request_sense = 1;
|
|
|
+ nv->bus[bus].target[target].parameter.tag_queuing = 1;
|
|
|
+ nv->bus[bus].target[target].parameter.enable_sync = 1;
|
|
|
#if 1 /* Some SCSI Processors do not seem to like this */
|
|
|
- nv->bus[bus].target[target].parameter.f.enable_wide = 1;
|
|
|
+ nv->bus[bus].target[target].parameter.enable_wide = 1;
|
|
|
#endif
|
|
|
- nv->bus[bus].target[target].parameter.f.parity_checking = 1;
|
|
|
- nv->bus[bus].target[target].parameter.f.disconnect_allowed = 1;
|
|
|
nv->bus[bus].target[target].execution_throttle =
|
|
|
nv->bus[bus].max_queue_depth - 1;
|
|
|
+ nv->bus[bus].target[target].parameter.parity_checking = 1;
|
|
|
+ nv->bus[bus].target[target].parameter.disconnect_allowed = 1;
|
|
|
|
|
|
if (IS_ISP1x160(ha)) {
|
|
|
nv->bus[bus].target[target].flags.flags1x160.device_enable = 1;
|
|
@@ -2284,9 +2203,9 @@ qla1280_set_defaults(struct scsi_qla_host *ha)
|
|
|
/* nv->cntr_flags_1.disable_loading_risc_code = 1; */
|
|
|
nv->firmware_feature.f.enable_fast_posting = 1;
|
|
|
nv->firmware_feature.f.disable_synchronous_backoff = 1;
|
|
|
- nv->termination.f.scsi_bus_0_control = 3;
|
|
|
- nv->termination.f.scsi_bus_1_control = 3;
|
|
|
- nv->termination.f.auto_term_support = 1;
|
|
|
+ nv->termination.scsi_bus_0_control = 3;
|
|
|
+ nv->termination.scsi_bus_1_control = 3;
|
|
|
+ nv->termination.auto_term_support = 1;
|
|
|
|
|
|
/*
|
|
|
* Set default FIFO magic - What appropriate values would be here
|
|
@@ -2296,7 +2215,12 @@ qla1280_set_defaults(struct scsi_qla_host *ha)
|
|
|
* header file provided by QLogic seems to be bogus or incomplete
|
|
|
* at best.
|
|
|
*/
|
|
|
- nv->isp_config.c = ISP_CFG1_BENAB|ISP_CFG1_F128;
|
|
|
+ nv->isp_config.burst_enable = 1;
|
|
|
+ if (IS_ISP1040(ha))
|
|
|
+ nv->isp_config.fifo_threshold |= 3;
|
|
|
+ else
|
|
|
+ nv->isp_config.fifo_threshold |= 4;
|
|
|
+
|
|
|
if (IS_ISP1x160(ha))
|
|
|
nv->isp_parameter = 0x01; /* fast memory enable */
|
|
|
|
|
@@ -2327,66 +2251,53 @@ qla1280_config_target(struct scsi_qla_host *ha, int bus, int target)
|
|
|
struct nvram *nv = &ha->nvram;
|
|
|
uint16_t mb[MAILBOX_REGISTER_COUNT];
|
|
|
int status, lun;
|
|
|
+ uint16_t flag;
|
|
|
|
|
|
/* Set Target Parameters. */
|
|
|
mb[0] = MBC_SET_TARGET_PARAMETERS;
|
|
|
- mb[1] = (uint16_t) (bus ? target | BIT_7 : target);
|
|
|
- mb[1] <<= 8;
|
|
|
-
|
|
|
- /*
|
|
|
- * Do not enable wide, sync, and ppr for the initial
|
|
|
- * INQUIRY run. We enable this later if we determine
|
|
|
- * the target actually supports it.
|
|
|
- */
|
|
|
- nv->bus[bus].target[target].parameter.f.
|
|
|
- auto_request_sense = 1;
|
|
|
- nv->bus[bus].target[target].parameter.f.
|
|
|
- stop_queue_on_check = 0;
|
|
|
-
|
|
|
- if (IS_ISP1x160(ha))
|
|
|
- nv->bus[bus].target[target].ppr_1x160.
|
|
|
- flags.enable_ppr = 0;
|
|
|
+ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
|
|
|
|
|
|
/*
|
|
|
- * No sync, wide, etc. while probing
|
|
|
+ * Do not enable sync and ppr for the initial INQUIRY run. We
|
|
|
+ * enable this later if we determine the target actually
|
|
|
+ * supports it.
|
|
|
*/
|
|
|
- mb[2] = (nv->bus[bus].target[target].parameter.c << 8) &
|
|
|
- ~(TP_SYNC /*| TP_WIDE | TP_PPR*/);
|
|
|
+ mb[2] = (TP_RENEGOTIATE | TP_AUTO_REQUEST_SENSE | TP_TAGGED_QUEUE
|
|
|
+ | TP_WIDE | TP_PARITY | TP_DISCONNECT);
|
|
|
|
|
|
if (IS_ISP1x160(ha))
|
|
|
mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8;
|
|
|
else
|
|
|
mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8;
|
|
|
mb[3] |= nv->bus[bus].target[target].sync_period;
|
|
|
-
|
|
|
- status = qla1280_mailbox_command(ha, BIT_3 | BIT_2 | BIT_1 | BIT_0, &mb[0]);
|
|
|
+ status = qla1280_mailbox_command(ha, 0x0f, mb);
|
|
|
|
|
|
/* Save Tag queuing enable flag. */
|
|
|
- mb[0] = BIT_0 << target;
|
|
|
- if (nv->bus[bus].target[target].parameter.f.tag_queuing)
|
|
|
- ha->bus_settings[bus].qtag_enables |= mb[0];
|
|
|
+ flag = (BIT_0 << target) & mb[0];
|
|
|
+ if (nv->bus[bus].target[target].parameter.tag_queuing)
|
|
|
+ ha->bus_settings[bus].qtag_enables |= flag;
|
|
|
|
|
|
/* Save Device enable flag. */
|
|
|
if (IS_ISP1x160(ha)) {
|
|
|
if (nv->bus[bus].target[target].flags.flags1x160.device_enable)
|
|
|
- ha->bus_settings[bus].device_enables |= mb[0];
|
|
|
+ ha->bus_settings[bus].device_enables |= flag;
|
|
|
ha->bus_settings[bus].lun_disables |= 0;
|
|
|
} else {
|
|
|
if (nv->bus[bus].target[target].flags.flags1x80.device_enable)
|
|
|
- ha->bus_settings[bus].device_enables |= mb[0];
|
|
|
+ ha->bus_settings[bus].device_enables |= flag;
|
|
|
/* Save LUN disable flag. */
|
|
|
if (nv->bus[bus].target[target].flags.flags1x80.lun_disable)
|
|
|
- ha->bus_settings[bus].lun_disables |= mb[0];
|
|
|
+ ha->bus_settings[bus].lun_disables |= flag;
|
|
|
}
|
|
|
|
|
|
/* Set Device Queue Parameters. */
|
|
|
for (lun = 0; lun < MAX_LUNS; lun++) {
|
|
|
mb[0] = MBC_SET_DEVICE_QUEUE;
|
|
|
- mb[1] = (uint16_t)(bus ? target | BIT_7 : target);
|
|
|
- mb[1] = mb[1] << 8 | lun;
|
|
|
+ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
|
|
|
+ mb[1] |= lun;
|
|
|
mb[2] = nv->bus[bus].max_queue_depth;
|
|
|
mb[3] = nv->bus[bus].target[target].execution_throttle;
|
|
|
- status |= qla1280_mailbox_command(ha, 0x0f, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, 0x0f, mb);
|
|
|
}
|
|
|
|
|
|
return status;
|
|
@@ -2431,7 +2342,6 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
|
|
|
struct nvram *nv = &ha->nvram;
|
|
|
int bus, target, status = 0;
|
|
|
uint16_t mb[MAILBOX_REGISTER_COUNT];
|
|
|
- uint16_t mask;
|
|
|
|
|
|
ENTER("qla1280_nvram_config");
|
|
|
|
|
@@ -2439,7 +2349,7 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
|
|
|
/* Always force AUTO sense for LINUX SCSI */
|
|
|
for (bus = 0; bus < MAX_BUSES; bus++)
|
|
|
for (target = 0; target < MAX_TARGETS; target++) {
|
|
|
- nv->bus[bus].target[target].parameter.f.
|
|
|
+ nv->bus[bus].target[target].parameter.
|
|
|
auto_request_sense = 1;
|
|
|
}
|
|
|
} else {
|
|
@@ -2457,31 +2367,40 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
|
|
|
|
|
|
hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK;
|
|
|
|
|
|
- cfg1 = RD_REG_WORD(®->cfg_1);
|
|
|
+ cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6);
|
|
|
cdma_conf = RD_REG_WORD(®->cdma_cfg);
|
|
|
ddma_conf = RD_REG_WORD(®->ddma_cfg);
|
|
|
|
|
|
/* Busted fifo, says mjacob. */
|
|
|
- if (hwrev == ISP_CFG0_1040A)
|
|
|
- WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64);
|
|
|
- else
|
|
|
- WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64 | ISP_CFG1_BENAB);
|
|
|
+ if (hwrev != ISP_CFG0_1040A)
|
|
|
+ cfg1 |= nv->isp_config.fifo_threshold << 4;
|
|
|
+
|
|
|
+ cfg1 |= nv->isp_config.burst_enable << 2;
|
|
|
+ WRT_REG_WORD(®->cfg_1, cfg1);
|
|
|
|
|
|
WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB);
|
|
|
WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB);
|
|
|
} else {
|
|
|
+ uint16_t cfg1, term;
|
|
|
+
|
|
|
/* Set ISP hardware DMA burst */
|
|
|
- mb[0] = nv->isp_config.c;
|
|
|
+ cfg1 = nv->isp_config.fifo_threshold << 4;
|
|
|
+ cfg1 |= nv->isp_config.burst_enable << 2;
|
|
|
/* Enable DMA arbitration on dual channel controllers */
|
|
|
if (ha->ports > 1)
|
|
|
- mb[0] |= BIT_13;
|
|
|
- WRT_REG_WORD(®->cfg_1, mb[0]);
|
|
|
+ cfg1 |= BIT_13;
|
|
|
+ WRT_REG_WORD(®->cfg_1, cfg1);
|
|
|
|
|
|
/* Set SCSI termination. */
|
|
|
- WRT_REG_WORD(®->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0));
|
|
|
- mb[0] = nv->termination.c & (BIT_3 + BIT_2 + BIT_1 + BIT_0);
|
|
|
- WRT_REG_WORD(®->gpio_data, mb[0]);
|
|
|
+ WRT_REG_WORD(®->gpio_enable,
|
|
|
+ BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
|
|
|
+ term = nv->termination.scsi_bus_1_control;
|
|
|
+ term |= nv->termination.scsi_bus_0_control << 2;
|
|
|
+ term |= nv->termination.auto_term_support << 7;
|
|
|
+ RD_REG_WORD(®->id_l); /* Flush PCI write */
|
|
|
+ WRT_REG_WORD(®->gpio_data, term);
|
|
|
}
|
|
|
+ RD_REG_WORD(®->id_l); /* Flush PCI write */
|
|
|
|
|
|
/* ISP parameter word. */
|
|
|
mb[0] = MBC_SET_SYSTEM_PARAMETER;
|
|
@@ -2497,16 +2416,17 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
|
|
|
|
|
|
/* Firmware feature word. */
|
|
|
mb[0] = MBC_SET_FIRMWARE_FEATURES;
|
|
|
- mask = BIT_5 | BIT_1 | BIT_0;
|
|
|
- mb[1] = le16_to_cpu(nv->firmware_feature.w) & (mask);
|
|
|
+ mb[1] = nv->firmware_feature.f.enable_fast_posting;
|
|
|
+ mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1;
|
|
|
+ mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5;
|
|
|
#if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2)
|
|
|
if (ia64_platform_is("sn2")) {
|
|
|
printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
|
|
|
"workaround\n", ha->host_no);
|
|
|
- mb[1] |= BIT_9;
|
|
|
+ mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */
|
|
|
}
|
|
|
#endif
|
|
|
- status |= qla1280_mailbox_command(ha, mask, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
|
|
|
|
|
|
/* Retry count and delay. */
|
|
|
mb[0] = MBC_SET_RETRY_COUNT;
|
|
@@ -2535,27 +2455,27 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
|
|
|
mb[2] |= BIT_5;
|
|
|
if (nv->bus[1].config_2.data_line_active_negation)
|
|
|
mb[2] |= BIT_4;
|
|
|
- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
|
|
|
|
|
|
mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY;
|
|
|
mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */
|
|
|
- status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
|
|
|
|
|
|
/* thingy */
|
|
|
mb[0] = MBC_SET_PCI_CONTROL;
|
|
|
- mb[1] = 2; /* Data DMA Channel Burst Enable */
|
|
|
- mb[2] = 2; /* Command DMA Channel Burst Enable */
|
|
|
- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
|
|
|
+ mb[1] = BIT_1; /* Data DMA Channel Burst Enable */
|
|
|
+ mb[2] = BIT_1; /* Command DMA Channel Burst Enable */
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
|
|
|
|
|
|
mb[0] = MBC_SET_TAG_AGE_LIMIT;
|
|
|
mb[1] = 8;
|
|
|
- status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
|
|
|
|
|
|
/* Selection timeout. */
|
|
|
mb[0] = MBC_SET_SELECTION_TIMEOUT;
|
|
|
mb[1] = nv->bus[0].selection_timeout;
|
|
|
mb[2] = nv->bus[1].selection_timeout;
|
|
|
- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
|
|
|
+ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
|
|
|
|
|
|
for (bus = 0; bus < ha->ports; bus++)
|
|
|
status |= qla1280_config_bus(ha, bus);
|
|
@@ -3066,7 +2986,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp)
|
|
|
struct scsi_cmnd *cmd = sp->cmd;
|
|
|
cmd_a64_entry_t *pkt;
|
|
|
struct scatterlist *sg = NULL;
|
|
|
- u32 *dword_ptr;
|
|
|
+ __le32 *dword_ptr;
|
|
|
dma_addr_t dma_handle;
|
|
|
int status = 0;
|
|
|
int cnt;
|
|
@@ -3104,10 +3024,13 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp)
|
|
|
REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt);
|
|
|
}
|
|
|
|
|
|
+ dprintk(3, "Number of free entries=(%d) seg_cnt=0x%x\n",
|
|
|
+ ha->req_q_cnt, seg_cnt);
|
|
|
+
|
|
|
/* If room for request in request ring. */
|
|
|
if ((req_cnt + 2) >= ha->req_q_cnt) {
|
|
|
status = 1;
|
|
|
- dprintk(2, "qla1280_64bit_start_scsi: in-ptr=0x%x req_q_cnt="
|
|
|
+ dprintk(2, "qla1280_start_scsi: in-ptr=0x%x req_q_cnt="
|
|
|
"0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt,
|
|
|
req_cnt);
|
|
|
goto out;
|
|
@@ -3119,7 +3042,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp)
|
|
|
|
|
|
if (cnt >= MAX_OUTSTANDING_COMMANDS) {
|
|
|
status = 1;
|
|
|
- dprintk(2, "qla1280_64bit_start_scsi: NO ROOM IN "
|
|
|
+ dprintk(2, "qla1280_start_scsi: NO ROOM IN "
|
|
|
"OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt);
|
|
|
goto out;
|
|
|
}
|
|
@@ -3128,7 +3051,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp)
|
|
|
ha->req_q_cnt -= req_cnt;
|
|
|
CMD_HANDLE(sp->cmd) = (unsigned char *)(unsigned long)(cnt + 1);
|
|
|
|
|
|
- dprintk(2, "64bit_start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp,
|
|
|
+ dprintk(2, "start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp,
|
|
|
cmd->cmnd[0], (long)CMD_HANDLE(sp->cmd));
|
|
|
dprintk(2, " bus %i, target %i, lun %i\n",
|
|
|
SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), SCSI_LUN_32(cmd));
|
|
@@ -3350,7 +3273,7 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp)
|
|
|
struct scsi_cmnd *cmd = sp->cmd;
|
|
|
struct cmd_entry *pkt;
|
|
|
struct scatterlist *sg = NULL;
|
|
|
- uint32_t *dword_ptr;
|
|
|
+ __le32 *dword_ptr;
|
|
|
int status = 0;
|
|
|
int cnt;
|
|
|
int req_cnt;
|
|
@@ -3993,21 +3916,21 @@ qla1280_get_target_options(struct scsi_cmnd *cmd, struct scsi_qla_host *ha)
|
|
|
result = cmd->request_buffer;
|
|
|
n = &ha->nvram;
|
|
|
|
|
|
- n->bus[bus].target[target].parameter.f.enable_wide = 0;
|
|
|
- n->bus[bus].target[target].parameter.f.enable_sync = 0;
|
|
|
+ n->bus[bus].target[target].parameter.enable_wide = 0;
|
|
|
+ n->bus[bus].target[target].parameter.enable_sync = 0;
|
|
|
n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0;
|
|
|
|
|
|
if (result[7] & 0x60)
|
|
|
- n->bus[bus].target[target].parameter.f.enable_wide = 1;
|
|
|
+ n->bus[bus].target[target].parameter.enable_wide = 1;
|
|
|
if (result[7] & 0x10)
|
|
|
- n->bus[bus].target[target].parameter.f.enable_sync = 1;
|
|
|
+ n->bus[bus].target[target].parameter.enable_sync = 1;
|
|
|
if ((result[2] >= 3) && (result[4] + 5 > 56) &&
|
|
|
(result[56] & 0x4))
|
|
|
n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1;
|
|
|
|
|
|
dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n",
|
|
|
- n->bus[bus].target[target].parameter.f.enable_wide,
|
|
|
- n->bus[bus].target[target].parameter.f.enable_sync,
|
|
|
+ n->bus[bus].target[target].parameter.enable_wide,
|
|
|
+ n->bus[bus].target[target].parameter.enable_sync,
|
|
|
n->bus[bus].target[target].ppr_1x160.flags.enable_ppr);
|
|
|
}
|
|
|
#endif
|
|
@@ -4071,7 +3994,7 @@ qla1280_status_entry(struct scsi_qla_host *ha, struct response *pkt,
|
|
|
/* Save ISP completion status */
|
|
|
CMD_RESULT(cmd) = qla1280_return_status(pkt, cmd);
|
|
|
|
|
|
- if (scsi_status & SS_CHECK_CONDITION) {
|
|
|
+ if (scsi_status & SAM_STAT_CHECK_CONDITION) {
|
|
|
if (comp_status != CS_ARS_FAILED) {
|
|
|
uint16_t req_sense_length =
|
|
|
le16_to_cpu(pkt->req_sense_length);
|
|
@@ -4650,7 +4573,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
if (pci_set_dma_mask(ha->pdev, (dma_addr_t) ~ 0ULL)) {
|
|
|
if (pci_set_dma_mask(ha->pdev, 0xffffffff)) {
|
|
|
printk(KERN_WARNING "scsi(%li): Unable to set a "
|
|
|
- " suitable DMA mask - aboring\n", ha->host_no);
|
|
|
+ "suitable DMA mask - aborting\n", ha->host_no);
|
|
|
error = -ENODEV;
|
|
|
goto error_free_irq;
|
|
|
}
|
|
@@ -4660,14 +4583,14 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
#else
|
|
|
if (pci_set_dma_mask(ha->pdev, 0xffffffff)) {
|
|
|
printk(KERN_WARNING "scsi(%li): Unable to set a "
|
|
|
- " suitable DMA mask - aboring\n", ha->host_no);
|
|
|
+ "suitable DMA mask - aborting\n", ha->host_no);
|
|
|
error = -ENODEV;
|
|
|
goto error_free_irq;
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
ha->request_ring = pci_alloc_consistent(ha->pdev,
|
|
|
- ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))),
|
|
|
+ ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)),
|
|
|
&ha->request_dma);
|
|
|
if (!ha->request_ring) {
|
|
|
printk(KERN_INFO "qla1280: Failed to get request memory\n");
|
|
@@ -4675,7 +4598,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
}
|
|
|
|
|
|
ha->response_ring = pci_alloc_consistent(ha->pdev,
|
|
|
- ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))),
|
|
|
+ ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)),
|
|
|
&ha->response_dma);
|
|
|
if (!ha->response_ring) {
|
|
|
printk(KERN_INFO "qla1280: Failed to get response memory\n");
|
|
@@ -4758,7 +4681,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
|
|
#if LINUX_VERSION_CODE >= 0x020600
|
|
|
error_disable_adapter:
|
|
|
- WRT_REG_WORD(&ha->iobase->ictrl, 0);
|
|
|
+ qla1280_disable_intrs(ha);
|
|
|
#endif
|
|
|
error_free_irq:
|
|
|
free_irq(pdev->irq, ha);
|
|
@@ -4770,11 +4693,11 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
#endif
|
|
|
error_free_response_ring:
|
|
|
pci_free_consistent(ha->pdev,
|
|
|
- ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))),
|
|
|
+ ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)),
|
|
|
ha->response_ring, ha->response_dma);
|
|
|
error_free_request_ring:
|
|
|
pci_free_consistent(ha->pdev,
|
|
|
- ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))),
|
|
|
+ ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)),
|
|
|
ha->request_ring, ha->request_dma);
|
|
|
error_put_host:
|
|
|
scsi_host_put(host);
|
|
@@ -4795,7 +4718,7 @@ qla1280_remove_one(struct pci_dev *pdev)
|
|
|
scsi_remove_host(host);
|
|
|
#endif
|
|
|
|
|
|
- WRT_REG_WORD(&ha->iobase->ictrl, 0);
|
|
|
+ qla1280_disable_intrs(ha);
|
|
|
|
|
|
free_irq(pdev->irq, ha);
|
|
|
|