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@@ -26,10 +26,18 @@
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#include <linux/serial_reg.h>
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-#include "../../iomap.h"
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-
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#define UART_SHIFT 2
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+/* Physical addresses */
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+#define TEGRA_CLK_RESET_BASE 0x60006000
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+#define TEGRA_APB_MISC_BASE 0x70000000
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+#define TEGRA_UARTA_BASE 0x70006000
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+#define TEGRA_UARTB_BASE 0x70006040
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+#define TEGRA_UARTC_BASE 0x70006200
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+#define TEGRA_UARTD_BASE 0x70006300
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+#define TEGRA_UARTE_BASE 0x70006400
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+#define TEGRA_PMC_BASE 0x7000e400
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+
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#define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
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#define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
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#define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
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@@ -39,6 +47,12 @@
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#define TEGRA_PMC_SCRATCH20 (TEGRA_PMC_BASE + 0xa0)
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#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)
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+/*
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+ * Must be 1MB-aligned since a 1MB mapping is used early on.
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+ * Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[].
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+ */
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+#define UART_VIRTUAL_BASE 0xfe100000
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+
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#define checkuart(rp, rv, lhu, bit, uart) \
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/* Load address of CLK_RST register */ \
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movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
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@@ -139,10 +153,10 @@
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91: str \rp, [\tmp, #4] @ Store in tegra_uart_phys
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cmp \rp, #0 @ Valid UART address?
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bne 92f @ Yes, go process it
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- str \rp, [\tmp, #8] @ Store 0 in tegra_uart_phys
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+ str \rp, [\tmp, #8] @ Store 0 in tegra_uart_virt
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b 100f @ Done
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-92: sub \rv, \rp, #IO_APB_PHYS @ Calculate virt address
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- add \rv, \rv, #IO_APB_VIRT
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+92: and \rv, \rp, #0xffffff @ offset within 1MB section
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+ add \rv, \rv, #UART_VIRTUAL_BASE
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str \rv, [\tmp, #8] @ Store in tegra_uart_virt
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movw \rv, #TEGRA_APB_MISC_GP_HIDREV & 0xffff
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movt \rv, #TEGRA_APB_MISC_GP_HIDREV >> 16
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