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@@ -526,6 +526,35 @@ int ar9002_hw_rf_claim(struct ath_hw *ah)
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return 0;
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}
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+/*
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+ * Enable ASYNC FIFO
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+ *
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+ * If Async FIFO is enabled, the following counters change as MAC now runs
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+ * at 117 Mhz instead of 88/44MHz when async FIFO is disabled.
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+ *
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+ * The values below tested for ht40 2 chain.
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+ * Overwrite the delay/timeouts initialized in process ini.
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+ */
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+void ar9002_hw_enable_async_fifo(struct ath_hw *ah)
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+{
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+ if (AR_SREV_9287_12_OR_LATER(ah)) {
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+ REG_WRITE(ah, AR_D_GBL_IFS_SIFS,
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+ AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR);
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+ REG_WRITE(ah, AR_D_GBL_IFS_SLOT,
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+ AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR);
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+ REG_WRITE(ah, AR_D_GBL_IFS_EIFS,
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+ AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR);
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+
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+ REG_WRITE(ah, AR_TIME_OUT, AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR);
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+ REG_WRITE(ah, AR_USEC, AR_USEC_ASYNC_FIFO_DUR);
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+
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+ REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER,
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+ AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768);
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+ REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
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+ AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL);
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+ }
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+}
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+
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/* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */
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void ar9002_hw_attach_ops(struct ath_hw *ah)
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{
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