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@@ -186,9 +186,9 @@ enum {
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NvRegSlotTime = 0x9c,
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#define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000
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#define NVREG_SLOTTIME_10_100_FULL 0x00007f00
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-#define NVREG_SLOTTIME_1000_FULL 0x0003ff00
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+#define NVREG_SLOTTIME_1000_FULL 0x0003ff00
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#define NVREG_SLOTTIME_HALF 0x0000ff00
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-#define NVREG_SLOTTIME_DEFAULT 0x00007f00
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+#define NVREG_SLOTTIME_DEFAULT 0x00007f00
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#define NVREG_SLOTTIME_MASK 0x000000ff
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NvRegTxDeferral = 0xA0,
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@@ -297,7 +297,7 @@ enum {
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#define NVREG_WAKEUPFLAGS_ENABLE 0x1111
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NvRegMgmtUnitGetVersion = 0x204,
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-#define NVREG_MGMTUNITGETVERSION 0x01
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+#define NVREG_MGMTUNITGETVERSION 0x01
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NvRegMgmtUnitVersion = 0x208,
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#define NVREG_MGMTUNITVERSION 0x08
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NvRegPowerCap = 0x268,
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@@ -368,8 +368,8 @@ struct ring_desc_ex {
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};
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union ring_type {
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- struct ring_desc* orig;
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- struct ring_desc_ex* ex;
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+ struct ring_desc *orig;
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+ struct ring_desc_ex *ex;
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};
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#define FLAG_MASK_V1 0xffff0000
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@@ -444,10 +444,10 @@ union ring_type {
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#define NV_RX3_VLAN_TAG_MASK (0x0000FFFF)
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/* Miscelaneous hardware related defines: */
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-#define NV_PCI_REGSZ_VER1 0x270
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-#define NV_PCI_REGSZ_VER2 0x2d4
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-#define NV_PCI_REGSZ_VER3 0x604
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-#define NV_PCI_REGSZ_MAX 0x604
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+#define NV_PCI_REGSZ_VER1 0x270
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+#define NV_PCI_REGSZ_VER2 0x2d4
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+#define NV_PCI_REGSZ_VER3 0x604
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+#define NV_PCI_REGSZ_MAX 0x604
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/* various timeout delays: all in usec */
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#define NV_TXRX_RESET_DELAY 4
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@@ -717,7 +717,7 @@ static const struct register_test nv_registers_test[] = {
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{ NvRegMulticastAddrA, 0xffffffff },
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{ NvRegTxWatermark, 0x0ff },
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{ NvRegWakeUpFlags, 0x07777 },
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- { 0,0 }
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+ { 0, 0 }
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};
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struct nv_skb_map {
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@@ -911,7 +911,7 @@ static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED;
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* Power down phy when interface is down (persists through reboot;
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* older Linux and other OSes may not power it up again)
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*/
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-static int phy_power_down = 0;
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+static int phy_power_down;
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static inline struct fe_priv *get_nvpriv(struct net_device *dev)
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{
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@@ -984,12 +984,10 @@ static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
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u8 __iomem *base = get_hwbase(dev);
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if (!nv_optimized(np)) {
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- if (rxtx_flags & NV_SETUP_RX_RING) {
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+ if (rxtx_flags & NV_SETUP_RX_RING)
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writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
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- }
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- if (rxtx_flags & NV_SETUP_TX_RING) {
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+ if (rxtx_flags & NV_SETUP_TX_RING)
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writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
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- }
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} else {
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if (rxtx_flags & NV_SETUP_RX_RING) {
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writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
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@@ -1174,9 +1172,8 @@ static int phy_reset(struct net_device *dev, u32 bmcr_setup)
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unsigned int tries = 0;
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miicontrol = BMCR_RESET | bmcr_setup;
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- if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) {
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+ if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol))
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return -1;
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- }
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/* wait for 500ms */
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msleep(500);
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@@ -1196,7 +1193,7 @@ static int phy_init(struct net_device *dev)
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{
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struct fe_priv *np = get_nvpriv(dev);
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u8 __iomem *base = get_hwbase(dev);
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- u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg;
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+ u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000, reg;
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/* phy errata for E3016 phy */
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if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
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@@ -1313,8 +1310,7 @@ static int phy_init(struct net_device *dev)
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printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
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return PHY_ERROR;
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}
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- }
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- else
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+ } else
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np->gigabit = 0;
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mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
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@@ -1340,7 +1336,7 @@ static int phy_init(struct net_device *dev)
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}
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/* phy vendor specific configuration */
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- if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) {
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+ if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII)) {
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phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
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phy_reserved &= ~(PHY_CICADA_INIT1 | PHY_CICADA_INIT2);
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phy_reserved |= (PHY_CICADA_INIT3 | PHY_CICADA_INIT4);
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@@ -1501,12 +1497,10 @@ static int phy_init(struct net_device *dev)
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/* restart auto negotiation, power down phy */
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mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
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mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
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- if (phy_power_down) {
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+ if (phy_power_down)
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mii_control |= BMCR_PDOWN;
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- }
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- if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
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+ if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))
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return PHY_ERROR;
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- }
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return 0;
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}
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@@ -1526,8 +1520,8 @@ static void nv_start_rx(struct net_device *dev)
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}
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writel(np->linkspeed, base + NvRegLinkSpeed);
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pci_push(base);
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- rx_ctrl |= NVREG_RCVCTL_START;
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- if (np->mac_in_use)
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+ rx_ctrl |= NVREG_RCVCTL_START;
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+ if (np->mac_in_use)
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rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN;
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writel(rx_ctrl, base + NvRegReceiverControl);
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dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
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@@ -1745,7 +1739,7 @@ static struct net_device_stats *nv_get_stats(struct net_device *dev)
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static int nv_alloc_rx(struct net_device *dev)
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{
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struct fe_priv *np = netdev_priv(dev);
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- struct ring_desc* less_rx;
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+ struct ring_desc *less_rx;
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less_rx = np->get_rx.orig;
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if (less_rx-- == np->first_rx.orig)
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@@ -1767,9 +1761,8 @@ static int nv_alloc_rx(struct net_device *dev)
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np->put_rx.orig = np->first_rx.orig;
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if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx))
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np->put_rx_ctx = np->first_rx_ctx;
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- } else {
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+ } else
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return 1;
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- }
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}
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return 0;
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}
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@@ -1777,7 +1770,7 @@ static int nv_alloc_rx(struct net_device *dev)
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static int nv_alloc_rx_optimized(struct net_device *dev)
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{
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struct fe_priv *np = netdev_priv(dev);
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- struct ring_desc_ex* less_rx;
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+ struct ring_desc_ex *less_rx;
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less_rx = np->get_rx.ex;
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if (less_rx-- == np->first_rx.ex)
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@@ -1800,9 +1793,8 @@ static int nv_alloc_rx_optimized(struct net_device *dev)
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np->put_rx.ex = np->first_rx.ex;
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if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx))
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np->put_rx_ctx = np->first_rx_ctx;
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- } else {
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+ } else
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return 1;
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- }
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}
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return 0;
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}
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@@ -2018,24 +2010,24 @@ static void nv_legacybackoff_reseed(struct net_device *dev)
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/* Known Good seed sets */
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static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
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- {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
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- {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974},
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- {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
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- {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974},
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- {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984},
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- {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984},
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- {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84},
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- {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184}};
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+ {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
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+ {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974},
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+ {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
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+ {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974},
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+ {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984},
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+ {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984},
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+ {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84},
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+ {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184} };
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static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
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- {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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- {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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- {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397},
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- {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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- {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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- {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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- {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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- {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}};
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+ {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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+ {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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+ {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397},
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+ {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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+ {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
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+ {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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+ {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
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+ {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395} };
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static void nv_gear_backoff_reseed(struct net_device *dev)
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{
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@@ -2083,13 +2075,12 @@ static void nv_gear_backoff_reseed(struct net_device *dev)
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temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT);
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temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK;
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temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR;
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- writel(temp,base + NvRegBackOffControl);
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+ writel(temp, base + NvRegBackOffControl);
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- /* Setup seeds for all gear LFSRs. */
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+ /* Setup seeds for all gear LFSRs. */
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get_random_bytes(&seedset, sizeof(seedset));
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seedset = seedset % BACKOFF_SEEDSET_ROWS;
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- for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++)
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- {
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+ for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++) {
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temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT);
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temp |= main_seedset[seedset][i-1] & 0x3ff;
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temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR);
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@@ -2113,10 +2104,10 @@ static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
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u32 size = skb_headlen(skb);
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u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
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u32 empty_slots;
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- struct ring_desc* put_tx;
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- struct ring_desc* start_tx;
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- struct ring_desc* prev_tx;
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- struct nv_skb_map* prev_tx_ctx;
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+ struct ring_desc *put_tx;
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+ struct ring_desc *start_tx;
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+ struct ring_desc *prev_tx;
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+ struct nv_skb_map *prev_tx_ctx;
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unsigned long flags;
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/* add fragments to entries count */
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@@ -2208,10 +2199,10 @@ static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
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dev->name, entries, tx_flags_extra);
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{
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int j;
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- for (j=0; j<64; j++) {
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+ for (j = 0; j < 64; j++) {
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if ((j%16) == 0)
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dprintk("\n%03x:", j);
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- dprintk(" %02x", ((unsigned char*)skb->data)[j]);
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+ dprintk(" %02x", ((unsigned char *)skb->data)[j]);
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}
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dprintk("\n");
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}
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@@ -2233,11 +2224,11 @@ static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb,
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u32 size = skb_headlen(skb);
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u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
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u32 empty_slots;
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- struct ring_desc_ex* put_tx;
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- struct ring_desc_ex* start_tx;
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- struct ring_desc_ex* prev_tx;
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- struct nv_skb_map* prev_tx_ctx;
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- struct nv_skb_map* start_tx_ctx;
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+ struct ring_desc_ex *put_tx;
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+ struct ring_desc_ex *start_tx;
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+ struct ring_desc_ex *prev_tx;
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+ struct nv_skb_map *prev_tx_ctx;
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+ struct nv_skb_map *start_tx_ctx;
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unsigned long flags;
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/* add fragments to entries count */
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@@ -2359,10 +2350,10 @@ static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb,
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dev->name, entries, tx_flags_extra);
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{
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int j;
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- for (j=0; j<64; j++) {
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+ for (j = 0; j < 64; j++) {
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if ((j%16) == 0)
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dprintk("\n%03x:", j);
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- dprintk(" %02x", ((unsigned char*)skb->data)[j]);
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+ dprintk(" %02x", ((unsigned char *)skb->data)[j]);
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}
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dprintk("\n");
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}
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@@ -2399,7 +2390,7 @@ static int nv_tx_done(struct net_device *dev, int limit)
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struct fe_priv *np = netdev_priv(dev);
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u32 flags;
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int tx_work = 0;
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- struct ring_desc* orig_get_tx = np->get_tx.orig;
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+ struct ring_desc *orig_get_tx = np->get_tx.orig;
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while ((np->get_tx.orig != np->put_tx.orig) &&
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!((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) &&
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@@ -2464,7 +2455,7 @@ static int nv_tx_done_optimized(struct net_device *dev, int limit)
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struct fe_priv *np = netdev_priv(dev);
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u32 flags;
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int tx_work = 0;
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- struct ring_desc_ex* orig_get_tx = np->get_tx.ex;
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+ struct ring_desc_ex *orig_get_tx = np->get_tx.ex;
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while ((np->get_tx.ex != np->put_tx.ex) &&
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!((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX2_VALID) &&
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@@ -2491,9 +2482,8 @@ static int nv_tx_done_optimized(struct net_device *dev, int limit)
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np->get_tx_ctx->skb = NULL;
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tx_work++;
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- if (np->tx_limit) {
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+ if (np->tx_limit)
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nv_tx_flip_ownership(dev);
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- }
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}
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if (unlikely(np->get_tx.ex++ == np->last_tx.ex))
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np->get_tx.ex = np->first_tx.ex;
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@@ -2532,7 +2522,7 @@ static void nv_tx_timeout(struct net_device *dev)
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printk(KERN_INFO "%s: Ring at %lx\n",
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dev->name, (unsigned long)np->ring_addr);
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printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
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- for (i=0;i<=np->register_size;i+= 32) {
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+ for (i = 0; i <= np->register_size; i += 32) {
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printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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i,
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readl(base + i + 0), readl(base + i + 4),
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@@ -2541,7 +2531,7 @@ static void nv_tx_timeout(struct net_device *dev)
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readl(base + i + 24), readl(base + i + 28));
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}
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printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
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- for (i=0;i<np->tx_ring_size;i+= 4) {
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+ for (i = 0; i < np->tx_ring_size; i += 4) {
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if (!nv_optimized(np)) {
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printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
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i,
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@@ -2616,11 +2606,11 @@ static int nv_getlen(struct net_device *dev, void *packet, int datalen)
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int protolen; /* length as stored in the proto field */
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/* 1) calculate len according to header */
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- if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) {
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- protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
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+ if (((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) {
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+ protolen = ntohs(((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto);
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hdrlen = VLAN_HLEN;
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} else {
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- protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
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+ protolen = ntohs(((struct ethhdr *)packet)->h_proto);
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hdrlen = ETH_HLEN;
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}
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dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
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@@ -2667,7 +2657,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
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struct sk_buff *skb;
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int len;
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- while((np->get_rx.orig != np->put_rx.orig) &&
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+ while ((np->get_rx.orig != np->put_rx.orig) &&
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!((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) &&
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(rx_work < limit)) {
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@@ -2687,11 +2677,11 @@ static int nv_rx_process(struct net_device *dev, int limit)
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{
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int j;
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- dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags);
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- for (j=0; j<64; j++) {
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+ dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).", flags);
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+ for (j = 0; j < 64; j++) {
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if ((j%16) == 0)
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dprintk("\n%03x:", j);
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- dprintk(" %02x", ((unsigned char*)skb->data)[j]);
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+ dprintk(" %02x", ((unsigned char *)skb->data)[j]);
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}
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dprintk("\n");
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}
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@@ -2710,9 +2700,8 @@ static int nv_rx_process(struct net_device *dev, int limit)
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}
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/* framing errors are soft errors */
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else if ((flags & NV_RX_ERROR_MASK) == NV_RX_FRAMINGERR) {
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- if (flags & NV_RX_SUBSTRACT1) {
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+ if (flags & NV_RX_SUBSTRACT1)
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len--;
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- }
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}
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/* the rest are hard errors */
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else {
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@@ -2745,9 +2734,8 @@ static int nv_rx_process(struct net_device *dev, int limit)
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}
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/* framing errors are soft errors */
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else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
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- if (flags & NV_RX2_SUBSTRACT1) {
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+ if (flags & NV_RX2_SUBSTRACT1)
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len--;
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- }
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}
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/* the rest are hard errors */
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else {
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@@ -2797,7 +2785,7 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
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struct sk_buff *skb;
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int len;
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|
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- while((np->get_rx.ex != np->put_rx.ex) &&
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+ while ((np->get_rx.ex != np->put_rx.ex) &&
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!((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) &&
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(rx_work < limit)) {
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@@ -2817,11 +2805,11 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
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{
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int j;
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- dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags);
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- for (j=0; j<64; j++) {
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+ dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).", flags);
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+ for (j = 0; j < 64; j++) {
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if ((j%16) == 0)
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dprintk("\n%03x:", j);
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- dprintk(" %02x", ((unsigned char*)skb->data)[j]);
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+ dprintk(" %02x", ((unsigned char *)skb->data)[j]);
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}
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dprintk("\n");
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}
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@@ -2838,9 +2826,8 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
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}
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/* framing errors are soft errors */
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else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
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- if (flags & NV_RX2_SUBSTRACT1) {
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+ if (flags & NV_RX2_SUBSTRACT1)
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len--;
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- }
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}
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/* the rest are hard errors */
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else {
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@@ -2949,7 +2936,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu)
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/* reinit nic view of the rx queue */
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writel(np->rx_buf_sz, base + NvRegOffloadConfig);
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setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
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- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
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+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
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base + NvRegRingSizes);
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pci_push(base);
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writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
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@@ -2986,7 +2973,7 @@ static void nv_copy_mac_to_hw(struct net_device *dev)
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static int nv_set_mac_address(struct net_device *dev, void *addr)
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{
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struct fe_priv *np = netdev_priv(dev);
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- struct sockaddr *macaddr = (struct sockaddr*)addr;
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+ struct sockaddr *macaddr = (struct sockaddr *)addr;
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if (!is_valid_ether_addr(macaddr->sa_data))
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return -EADDRNOTAVAIL;
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@@ -3302,7 +3289,7 @@ set_speed:
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}
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writel(txreg, base + NvRegTxWatermark);
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- writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
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+ writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD),
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base + NvRegMisc1);
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pci_push(base);
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writel(np->linkspeed, base + NvRegLinkSpeed);
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@@ -3312,8 +3299,8 @@ set_speed:
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/* setup pause frame */
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if (np->duplex != 0) {
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if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) {
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- adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM);
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- lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM);
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+ adv_pause = adv & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
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+ lpa_pause = lpa & (LPA_PAUSE_CAP | LPA_PAUSE_ASYM);
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switch (adv_pause) {
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case ADVERTISE_PAUSE_CAP:
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@@ -3324,22 +3311,17 @@ set_speed:
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}
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break;
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case ADVERTISE_PAUSE_ASYM:
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- if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM))
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- {
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+ if (lpa_pause == (LPA_PAUSE_CAP | LPA_PAUSE_ASYM))
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pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
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- }
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break;
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- case ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM:
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- if (lpa_pause & LPA_PAUSE_CAP)
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- {
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+ case ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM:
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+ if (lpa_pause & LPA_PAUSE_CAP) {
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|
pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
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|
if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
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|
pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
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|
|
}
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|
if (lpa_pause == LPA_PAUSE_ASYM)
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|
- {
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|
|
pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
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- }
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break;
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}
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} else {
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@@ -3514,7 +3496,7 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data)
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|
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dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
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- for (i=0; ; i++) {
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+ for (i = 0;; i++) {
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events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
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|
writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
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|
dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
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|
@@ -3553,7 +3535,7 @@ static int nv_napi_poll(struct napi_struct *napi, int budget)
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|
|
u8 __iomem *base = get_hwbase(dev);
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|
|
unsigned long flags;
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|
|
int retcode;
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|
|
- int rx_count, tx_work=0, rx_work=0;
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|
+ int rx_count, tx_work = 0, rx_work = 0;
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|
|
|
|
do {
|
|
|
if (!nv_optimized(np)) {
|
|
@@ -3628,7 +3610,7 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data)
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|
|
|
dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
|
|
|
|
|
|
- for (i=0; ; i++) {
|
|
|
+ for (i = 0;; i++) {
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|
|
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
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|
|
writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
|
|
|
dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
|
|
@@ -3675,7 +3657,7 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data)
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|
|
dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
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|
|
|
|
- for (i=0; ; i++) {
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|
|
+ for (i = 0;; i++) {
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|
|
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
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|
|
writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
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|
|
dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
|
|
@@ -3776,17 +3758,15 @@ static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
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|
* the remaining 8 interrupts.
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|
|
*/
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|
|
for (i = 0; i < 8; i++) {
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|
|
- if ((irqmask >> i) & 0x1) {
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|
|
+ if ((irqmask >> i) & 0x1)
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|
|
msixmap |= vector << (i << 2);
|
|
|
- }
|
|
|
}
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|
|
writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
|
|
|
|
|
|
msixmap = 0;
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|
|
for (i = 0; i < 8; i++) {
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|
|
- if ((irqmask >> (i + 8)) & 0x1) {
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|
|
+ if ((irqmask >> (i + 8)) & 0x1)
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|
|
msixmap |= vector << (i << 2);
|
|
|
- }
|
|
|
}
|
|
|
writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
|
|
|
}
|
|
@@ -3809,9 +3789,8 @@ static int nv_request_irq(struct net_device *dev, int intr_test)
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|
|
}
|
|
|
|
|
|
if (np->msi_flags & NV_MSI_X_CAPABLE) {
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|
|
- for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
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|
|
+ for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++)
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|
|
np->msi_x_entry[i].entry = i;
|
|
|
- }
|
|
|
if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
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|
|
np->msi_flags |= NV_MSI_X_ENABLED;
|
|
|
if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) {
|
|
@@ -3903,9 +3882,8 @@ static void nv_free_irq(struct net_device *dev)
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|
|
int i;
|
|
|
|
|
|
if (np->msi_flags & NV_MSI_X_ENABLED) {
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|
|
- for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
|
|
|
+ for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++)
|
|
|
free_irq(np->msi_x_entry[i].vector, dev);
|
|
|
- }
|
|
|
pci_disable_msix(np->pci_dev);
|
|
|
np->msi_flags &= ~NV_MSI_X_ENABLED;
|
|
|
} else {
|
|
@@ -3975,7 +3953,7 @@ static void nv_do_nic_poll(unsigned long data)
|
|
|
/* reinit nic view of the rx queue */
|
|
|
writel(np->rx_buf_sz, base + NvRegOffloadConfig);
|
|
|
setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
|
|
|
- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
base + NvRegRingSizes);
|
|
|
pci_push(base);
|
|
|
writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
|
|
@@ -4105,7 +4083,7 @@ static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
|
|
|
}
|
|
|
|
|
|
if (netif_carrier_ok(dev)) {
|
|
|
- switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) {
|
|
|
+ switch (np->linkspeed & (NVREG_LINKSPEED_MASK)) {
|
|
|
case NVREG_LINKSPEED_10:
|
|
|
ecmd->speed = SPEED_10;
|
|
|
break;
|
|
@@ -4344,7 +4322,7 @@ static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void
|
|
|
|
|
|
regs->version = FORCEDETH_REGS_VER;
|
|
|
spin_lock_irq(&np->lock);
|
|
|
- for (i = 0;i <= np->register_size/sizeof(u32); i++)
|
|
|
+ for (i = 0; i <= np->register_size/sizeof(u32); i++)
|
|
|
rbuf[i] = readl(base + i*sizeof(u32));
|
|
|
spin_unlock_irq(&np->lock);
|
|
|
}
|
|
@@ -4491,14 +4469,14 @@ static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ri
|
|
|
np->tx_ring_size = ring->tx_pending;
|
|
|
|
|
|
if (!nv_optimized(np)) {
|
|
|
- np->rx_ring.orig = (struct ring_desc*)rxtx_ring;
|
|
|
+ np->rx_ring.orig = (struct ring_desc *)rxtx_ring;
|
|
|
np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
|
|
|
} else {
|
|
|
- np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring;
|
|
|
+ np->rx_ring.ex = (struct ring_desc_ex *)rxtx_ring;
|
|
|
np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
|
|
|
}
|
|
|
- np->rx_skb = (struct nv_skb_map*)rx_skbuff;
|
|
|
- np->tx_skb = (struct nv_skb_map*)tx_skbuff;
|
|
|
+ np->rx_skb = (struct nv_skb_map *)rx_skbuff;
|
|
|
+ np->tx_skb = (struct nv_skb_map *)tx_skbuff;
|
|
|
np->ring_addr = ring_addr;
|
|
|
|
|
|
memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size);
|
|
@@ -4515,7 +4493,7 @@ static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ri
|
|
|
/* reinit nic view of the queues */
|
|
|
writel(np->rx_buf_sz, base + NvRegOffloadConfig);
|
|
|
setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
|
|
|
- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
base + NvRegRingSizes);
|
|
|
pci_push(base);
|
|
|
writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
|
|
@@ -4841,7 +4819,7 @@ static int nv_loopback_test(struct net_device *dev)
|
|
|
/* reinit nic view of the rx queue */
|
|
|
writel(np->rx_buf_sz, base + NvRegOffloadConfig);
|
|
|
setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
|
|
|
- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
base + NvRegRingSizes);
|
|
|
pci_push(base);
|
|
|
|
|
@@ -4893,9 +4871,8 @@ static int nv_loopback_test(struct net_device *dev)
|
|
|
if (flags & NV_RX_ERROR)
|
|
|
ret = 0;
|
|
|
} else {
|
|
|
- if (flags & NV_RX2_ERROR) {
|
|
|
+ if (flags & NV_RX2_ERROR)
|
|
|
ret = 0;
|
|
|
- }
|
|
|
}
|
|
|
|
|
|
if (ret) {
|
|
@@ -4958,11 +4935,10 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
|
|
|
netif_addr_lock(dev);
|
|
|
spin_lock_irq(&np->lock);
|
|
|
nv_disable_hw_interrupts(dev, np->irqmask);
|
|
|
- if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
|
|
|
+ if (!(np->msi_flags & NV_MSI_X_ENABLED))
|
|
|
writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
|
|
|
- } else {
|
|
|
+ else
|
|
|
writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
|
|
|
- }
|
|
|
/* stop engines */
|
|
|
nv_stop_rxtx(dev);
|
|
|
nv_txrx_reset(dev);
|
|
@@ -5003,7 +4979,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64
|
|
|
/* reinit nic view of the rx queue */
|
|
|
writel(np->rx_buf_sz, base + NvRegOffloadConfig);
|
|
|
setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
|
|
|
- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
base + NvRegRingSizes);
|
|
|
pci_push(base);
|
|
|
writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
|
|
@@ -5106,8 +5082,7 @@ static int nv_mgmt_acquire_sema(struct net_device *dev)
|
|
|
((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE)) {
|
|
|
np->mgmt_sema = 1;
|
|
|
return 1;
|
|
|
- }
|
|
|
- else
|
|
|
+ } else
|
|
|
udelay(50);
|
|
|
}
|
|
|
|
|
@@ -5204,7 +5179,7 @@ static int nv_open(struct net_device *dev)
|
|
|
|
|
|
/* give hw rings */
|
|
|
setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
|
|
|
- writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
+ writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
|
|
|
base + NvRegRingSizes);
|
|
|
|
|
|
writel(np->linkspeed, base + NvRegLinkSpeed);
|
|
@@ -5251,8 +5226,7 @@ static int nv_open(struct net_device *dev)
|
|
|
writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
|
|
|
else
|
|
|
writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
|
|
|
- }
|
|
|
- else
|
|
|
+ } else
|
|
|
writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
|
|
|
writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
|
|
|
writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
|
|
@@ -5263,7 +5237,7 @@ static int nv_open(struct net_device *dev)
|
|
|
writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
|
|
|
|
|
|
i = readl(base + NvRegPowerState);
|
|
|
- if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0)
|
|
|
+ if ((i & NVREG_POWERSTATE_POWEREDUP) == 0)
|
|
|
writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
|
|
|
|
|
|
pci_push(base);
|
|
@@ -5276,9 +5250,8 @@ static int nv_open(struct net_device *dev)
|
|
|
writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
|
|
|
pci_push(base);
|
|
|
|
|
|
- if (nv_request_irq(dev, 0)) {
|
|
|
+ if (nv_request_irq(dev, 0))
|
|
|
goto out_drain;
|
|
|
- }
|
|
|
|
|
|
/* ask for interrupts */
|
|
|
nv_enable_hw_interrupts(dev, np->irqmask);
|
|
@@ -5466,7 +5439,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
addr = 0;
|
|
|
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
|
|
|
dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
|
|
|
- pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i),
|
|
|
+ pci_name(pci_dev), i, (void *)pci_resource_start(pci_dev, i),
|
|
|
pci_resource_len(pci_dev, i),
|
|
|
pci_resource_flags(pci_dev, i));
|
|
|
if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
|
|
@@ -5631,7 +5604,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
*/
|
|
|
dev_printk(KERN_ERR, &pci_dev->dev,
|
|
|
"Invalid Mac address detected: %pM\n",
|
|
|
- dev->dev_addr);
|
|
|
+ dev->dev_addr);
|
|
|
dev_printk(KERN_ERR, &pci_dev->dev,
|
|
|
"Please complain to your hardware vendor. Switching to a random MAC.\n");
|
|
|
random_ether_addr(dev->dev_addr);
|
|
@@ -5663,16 +5636,15 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
writel(powerstate, base + NvRegPowerState2);
|
|
|
}
|
|
|
|
|
|
- if (np->desc_ver == DESC_VER_1) {
|
|
|
+ if (np->desc_ver == DESC_VER_1)
|
|
|
np->tx_flags = NV_TX_VALID;
|
|
|
- } else {
|
|
|
+ else
|
|
|
np->tx_flags = NV_TX2_VALID;
|
|
|
- }
|
|
|
|
|
|
np->msi_flags = 0;
|
|
|
- if ((id->driver_data & DEV_HAS_MSI) && msi) {
|
|
|
+ if ((id->driver_data & DEV_HAS_MSI) && msi)
|
|
|
np->msi_flags |= NV_MSI_CAPABLE;
|
|
|
- }
|
|
|
+
|
|
|
if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
|
|
|
/* msix has had reported issues when modifying irqmask
|
|
|
as in the case of napi, therefore, disable for now
|
|
@@ -5735,9 +5707,8 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
nv_mgmt_acquire_sema(dev) &&
|
|
|
nv_mgmt_get_version(dev)) {
|
|
|
np->mac_in_use = 1;
|
|
|
- if (np->mgmt_version > 0) {
|
|
|
+ if (np->mgmt_version > 0)
|
|
|
np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE;
|
|
|
- }
|
|
|
dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n",
|
|
|
pci_name(pci_dev), np->mac_in_use);
|
|
|
/* management unit setup the phy already? */
|
|
@@ -5799,9 +5770,8 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
} else {
|
|
|
/* see if it is a gigabit phy */
|
|
|
u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
|
|
|
- if (mii_status & PHY_GIGABIT) {
|
|
|
+ if (mii_status & PHY_GIGABIT)
|
|
|
np->gigabit = PHY_GIGABIT;
|
|
|
- }
|
|
|
}
|
|
|
|
|
|
/* set default link speed settings */
|
|
@@ -5829,19 +5799,19 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|
|
dev->dev_addr[5]);
|
|
|
|
|
|
dev_printk(KERN_INFO, &pci_dev->dev, "%s%s%s%s%s%s%s%s%s%sdesc-v%u\n",
|
|
|
- dev->features & NETIF_F_HIGHDMA ? "highdma " : "",
|
|
|
- dev->features & (NETIF_F_IP_CSUM | NETIF_F_SG) ?
|
|
|
- "csum " : "",
|
|
|
- dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ?
|
|
|
- "vlan " : "",
|
|
|
- id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "",
|
|
|
- id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "",
|
|
|
- id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "",
|
|
|
- np->gigabit == PHY_GIGABIT ? "gbit " : "",
|
|
|
- np->need_linktimer ? "lnktim " : "",
|
|
|
- np->msi_flags & NV_MSI_CAPABLE ? "msi " : "",
|
|
|
- np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "",
|
|
|
- np->desc_ver);
|
|
|
+ dev->features & NETIF_F_HIGHDMA ? "highdma " : "",
|
|
|
+ dev->features & (NETIF_F_IP_CSUM | NETIF_F_SG) ?
|
|
|
+ "csum " : "",
|
|
|
+ dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ?
|
|
|
+ "vlan " : "",
|
|
|
+ id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "",
|
|
|
+ id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "",
|
|
|
+ id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "",
|
|
|
+ np->gigabit == PHY_GIGABIT ? "gbit " : "",
|
|
|
+ np->need_linktimer ? "lnktim " : "",
|
|
|
+ np->msi_flags & NV_MSI_CAPABLE ? "msi " : "",
|
|
|
+ np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "",
|
|
|
+ np->desc_ver);
|
|
|
|
|
|
return 0;
|
|
|
|
|
@@ -5931,13 +5901,13 @@ static int nv_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
|
int i;
|
|
|
|
|
|
if (netif_running(dev)) {
|
|
|
- // Gross.
|
|
|
+ /* Gross. */
|
|
|
nv_close(dev);
|
|
|
}
|
|
|
netif_device_detach(dev);
|
|
|
|
|
|
/* save non-pci configuration space */
|
|
|
- for (i = 0;i <= np->register_size/sizeof(u32); i++)
|
|
|
+ for (i = 0; i <= np->register_size/sizeof(u32); i++)
|
|
|
np->saved_config_space[i] = readl(base + i*sizeof(u32));
|
|
|
|
|
|
pci_save_state(pdev);
|
|
@@ -5960,7 +5930,7 @@ static int nv_resume(struct pci_dev *pdev)
|
|
|
pci_enable_wake(pdev, PCI_D0, 0);
|
|
|
|
|
|
/* restore non-pci configuration space */
|
|
|
- for (i = 0;i <= np->register_size/sizeof(u32); i++)
|
|
|
+ for (i = 0; i <= np->register_size/sizeof(u32); i++)
|
|
|
writel(np->saved_config_space[i], base+i*sizeof(u32));
|
|
|
|
|
|
if (np->driver_data & DEV_NEED_MSI_FIX)
|
|
@@ -5990,9 +5960,8 @@ static void nv_shutdown(struct pci_dev *pdev)
|
|
|
* If we really go for poweroff, we must not restore the MAC,
|
|
|
* otherwise the MAC for WOL will be reversed at least on some boards.
|
|
|
*/
|
|
|
- if (system_state != SYSTEM_POWER_OFF) {
|
|
|
+ if (system_state != SYSTEM_POWER_OFF)
|
|
|
nv_restore_mac_addr(pdev);
|
|
|
- }
|
|
|
|
|
|
pci_disable_device(pdev);
|
|
|
/*
|