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@@ -1129,10 +1129,11 @@ snd_azf3328_codec_setdmaa(struct snd_azf3328 *chip,
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count_areas = size/2;
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addr_area2 = addr+count_areas;
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- count_areas--; /* max. index */
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snd_azf3328_dbgcodec("setdma: buffers %08lx[%u] / %08lx[%u]\n",
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addr, count_areas, addr_area2, count_areas);
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+ count_areas--; /* max. index */
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+
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/* build combined I/O buffer length word */
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lengths = (count_areas << 16) | (count_areas);
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spin_lock_irqsave(&chip->reg_lock, flags);
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@@ -1740,11 +1741,15 @@ static const struct snd_pcm_hardware snd_azf3328_hardware =
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.rate_max = AZF_FREQ_66200,
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.channels_min = 1,
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.channels_max = 2,
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- .buffer_bytes_max = 65536,
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- .period_bytes_min = 64,
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- .period_bytes_max = 65536,
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- .periods_min = 1,
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- .periods_max = 1024,
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+ .buffer_bytes_max = (64*1024),
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+ .period_bytes_min = 1024,
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+ .period_bytes_max = (32*1024),
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+ /* We simply have two DMA areas (instead of a list of descriptors
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+ such as other cards); I believe that this is a fixed hardware
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+ attribute and there isn't much driver magic to be done to expand it.
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+ Thus indicate that we have at least and at most 2 periods. */
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+ .periods_min = 2,
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+ .periods_max = 2,
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/* FIXME: maybe that card actually has a FIFO?
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* Hmm, it seems newer revisions do have one, but we still don't know
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* its size... */
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@@ -1980,8 +1985,13 @@ snd_azf3328_timer_stop(struct snd_timer *timer)
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chip = snd_timer_chip(timer);
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spin_lock_irqsave(&chip->reg_lock, flags);
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/* disable timer countdown and interrupt */
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- /* FIXME: should we write TIMER_IRQ_ACK here? */
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- snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
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+ /* Hmm, should we write TIMER_IRQ_ACK here?
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+ YES indeed, otherwise a rogue timer operation - which prompts
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+ ALSA(?) to call repeated stop() in vain, but NOT start() -
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+ will never end (value 0x03 is kept shown in control byte).
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+ Simply manually poking 0x04 _once_ immediately successfully stops
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+ the hardware/ALSA interrupt activity. */
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+ snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x04);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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snd_azf3328_dbgcallleave();
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return 0;
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