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@@ -575,6 +575,14 @@ struct dwc3_hwparams {
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/* HWPARAMS1 */
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#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15)
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+/* HWPARAMS3 */
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+#define DWC3_NUM_IN_EPS_MASK (0x1f << 18)
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+#define DWC3_NUM_EPS_MASK (0x3f << 12)
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+#define DWC3_NUM_EPS(p) (((p)->hwparams3 & \
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+ (DWC3_NUM_EPS_MASK)) >> 12)
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+#define DWC3_NUM_IN_EPS(p) (((p)->hwparams3 & \
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+ (DWC3_NUM_IN_EPS_MASK)) >> 18)
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+
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/* HWPARAMS7 */
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#define DWC3_RAM1_DEPTH(n) ((n) & 0xffff)
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@@ -641,6 +649,8 @@ struct dwc3_scratchpad_array {
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* @u2pel: parameter from Set SEL request.
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* @u1sel: parameter from Set SEL request.
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* @u1pel: parameter from Set SEL request.
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+ * @num_out_eps: number of out endpoints
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+ * @num_in_eps: number of in endpoints
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* @ep0_next_event: hold the next expected event
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* @ep0state: state of endpoint zero
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* @link_state: link state
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@@ -658,8 +668,10 @@ struct dwc3 {
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dma_addr_t ep0_trb_addr;
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dma_addr_t ep0_bounce_addr;
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struct dwc3_request ep0_usb_req;
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+
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/* device lock */
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spinlock_t lock;
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+
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struct device *dev;
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struct platform_device *xhci;
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@@ -727,6 +739,9 @@ struct dwc3 {
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u8 speed;
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+ u8 num_out_eps;
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+ u8 num_in_eps;
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+
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void *mem;
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struct dwc3_hwparams hwparams;
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