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@@ -52,8 +52,7 @@
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* national semiconductor nv ram chip the op code is 3 bits and
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* the address is 6/8 bits.
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*/
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-static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
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- unsigned reg)
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+static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
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{
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unsigned short ser_cmd;
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int i;
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@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
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ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
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for (i = 0; i < BITS_IN_COMMAND; i++) {
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if (ser_cmd & (1<<15)) /* if high order bit set */
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- *ctrl |= EEPROM_DATO;
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+ writel(readl(ctrl) | EEPROM_DATO, ctrl);
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else
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- *ctrl &= ~EEPROM_DATO;
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- *ctrl &= ~EEPROM_ECLK;
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- *ctrl |= EEPROM_ECLK;
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+ writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
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+ writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
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+ writel(readl(ctrl) | EEPROM_ECLK, ctrl);
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ser_cmd <<= 1;
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}
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- *ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */
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+ /* see data sheet timing diagram */
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+ writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
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}
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-unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg)
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+unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
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{
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unsigned short res = 0;
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int i;
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- *ctrl &= ~EEPROM_EPROT;
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+ writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
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eeprom_cs_on(ctrl);
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eeprom_cmd(ctrl, EEPROM_READ, reg);
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/* clock the data ouf of serial mem */
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for (i = 0; i < 16; i++) {
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- *ctrl &= ~EEPROM_ECLK;
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+ writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
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delay();
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- *ctrl |= EEPROM_ECLK;
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+ writel(readl(ctrl) | EEPROM_ECLK, ctrl);
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delay();
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res <<= 1;
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- if (*ctrl & EEPROM_DATI)
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+ if (readl(ctrl) & EEPROM_DATI)
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res |= 1;
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}
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