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[MIPS] Alchemy: Fix bunch of warnings

  CC      arch/mips/au1000/common/pci.o
arch/mips/au1000/common/pci.c:42: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:43: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:49: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:50: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c: In function ‘au1x_pci_setup’:
arch/mips/au1000/common/pci.c:82: warning: ISO C90 forbids mixed declarations and code

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle 18 年之前
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共有 2 个文件被更改,包括 18 次插入13 次删除
  1. 11 7
      arch/mips/au1000/common/pci.c
  2. 7 6
      include/asm-mips/mach-au1x00/au1000.h

+ 11 - 7
arch/mips/au1000/common/pci.c

@@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void)
 	}
 	}
 
 
 #ifdef CONFIG_DMA_NONCOHERENT
 #ifdef CONFIG_DMA_NONCOHERENT
-	/*
-         *  Set the NC bit in controller for Au1500 pre-AC silicon
-	 */
-	u32 prid = read_c0_prid();
-	if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
-	       au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
-	       printk("Non-coherent PCI accesses enabled\n");
+	{
+		/*
+		 *  Set the NC bit in controller for Au1500 pre-AC silicon
+		 */
+		u32 prid = read_c0_prid();
+
+		if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
+		       au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
+			         Au1500_PCI_CFG);
+		       printk("Non-coherent PCI accesses enabled\n");
+		}
 	}
 	}
 #endif
 #endif
 
 

+ 7 - 6
include/asm-mips/mach-au1x00/au1000.h

@@ -39,6 +39,7 @@
 #ifndef _LANGUAGE_ASSEMBLY
 #ifndef _LANGUAGE_ASSEMBLY
 
 
 #include <linux/delay.h>
 #include <linux/delay.h>
+#include <linux/types.h>
 #include <asm/io.h>
 #include <asm/io.h>
 
 
 /* cpu pipeline flush */
 /* cpu pipeline flush */
@@ -1664,12 +1665,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
  * addresses.  For PCI IO, it's simpler because we get to do the ioremap
  * addresses.  For PCI IO, it's simpler because we get to do the ioremap
  * ourselves and then adjust the device's resources.
  * ourselves and then adjust the device's resources.
  */
  */
-#define Au1500_EXT_CFG            0x600000000ULL
-#define Au1500_EXT_CFG_TYPE1      0x680000000ULL
-#define Au1500_PCI_IO_START       0x500000000ULL
-#define Au1500_PCI_IO_END         0x5000FFFFFULL
-#define Au1500_PCI_MEM_START      0x440000000ULL
-#define Au1500_PCI_MEM_END        0x44FFFFFFFULL
+#define Au1500_EXT_CFG            ((resource_size_t) 0x600000000ULL)
+#define Au1500_EXT_CFG_TYPE1      ((resource_size_t) 0x680000000ULL)
+#define Au1500_PCI_IO_START       ((resource_size_t) 0x500000000ULL)
+#define Au1500_PCI_IO_END         ((resource_size_t) 0x5000FFFFFULL)
+#define Au1500_PCI_MEM_START      ((resource_size_t) 0x440000000ULL)
+#define Au1500_PCI_MEM_END        ((resource_size_t) 0x44FFFFFFFULL)
 
 
 #define PCI_IO_START    (Au1500_PCI_IO_START + 0x1000)
 #define PCI_IO_START    (Au1500_PCI_IO_START + 0x1000)
 #define PCI_IO_END      (Au1500_PCI_IO_END)
 #define PCI_IO_END      (Au1500_PCI_IO_END)