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@@ -3317,22 +3317,49 @@ done:
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return rc;
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}
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+static void pci_dev_lock(struct pci_dev *dev)
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+{
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+ pci_cfg_access_lock(dev);
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+ /* block PM suspend, driver probe, etc. */
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+ device_lock(&dev->dev);
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+}
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+
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+static void pci_dev_unlock(struct pci_dev *dev)
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+{
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+ device_unlock(&dev->dev);
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+ pci_cfg_access_unlock(dev);
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+}
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+
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+static void pci_dev_save_and_disable(struct pci_dev *dev)
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+{
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+ pci_save_state(dev);
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+ /*
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+ * Disable the device by clearing the Command register, except for
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+ * INTx-disable which is set. This not only disables MMIO and I/O port
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+ * BARs, but also prevents the device from being Bus Master, preventing
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+ * DMA from the device including MSI/MSI-X interrupts. For PCI 2.3
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+ * compliant devices, INTx-disable prevents legacy interrupts.
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+ */
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+ pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
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+}
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+
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+static void pci_dev_restore(struct pci_dev *dev)
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+{
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+ pci_restore_state(dev);
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+}
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+
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static int pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int rc;
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- if (!probe) {
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- pci_cfg_access_lock(dev);
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- /* block PM suspend, driver probe, etc. */
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- device_lock(&dev->dev);
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- }
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+ if (!probe)
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+ pci_dev_lock(dev);
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rc = __pci_dev_reset(dev, probe);
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- if (!probe) {
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- device_unlock(&dev->dev);
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- pci_cfg_access_unlock(dev);
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- }
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+ if (!probe)
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+ pci_dev_unlock(dev);
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+
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return rc;
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}
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/**
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@@ -3423,17 +3450,11 @@ int pci_reset_function(struct pci_dev *dev)
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if (rc)
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return rc;
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- pci_save_state(dev);
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-
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- /*
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- * both INTx and MSI are disabled after the Interrupt Disable bit
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- * is set and the Bus Master bit is cleared.
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- */
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- pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
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+ pci_dev_save_and_disable(dev);
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rc = pci_dev_reset(dev, 0);
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- pci_restore_state(dev);
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+ pci_dev_restore(dev);
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return rc;
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}
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