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@@ -282,6 +282,24 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
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#define ioremap_nocache(offset, size) \
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__ioremap_mode((offset), (size), _CACHE_UNCACHED)
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+/*
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+ * ioremap_cachable - map bus memory into CPU space
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+ * @offset: bus address of the memory
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+ * @size: size of the resource to map
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+ *
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+ * ioremap_nocache performs a platform specific sequence of operations to
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+ * make bus memory CPU accessible via the readb/readw/readl/writeb/
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+ * writew/writel functions and the other mmio helpers. The returned
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+ * address is not guaranteed to be usable directly as a virtual
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+ * address.
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+ *
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+ * This version of ioremap ensures that the memory is marked cachable by
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+ * the CPU. Also enables full write-combining. Useful for some
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+ * memory-like regions on I/O busses.
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+ */
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+#define ioremap_cachable(offset, size) \
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+ __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT)
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+
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/*
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* These two are MIPS specific ioremap variant. ioremap_cacheable_cow
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* requests a cachable mapping, ioremap_uncached_accelerated requests a
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