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+/*
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+ * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c
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+ *
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+ * Power management support code for SuperH Mobile
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+ *
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+ * Copyright (C) 2009 Magnus Damm
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+ *
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ */
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/io.h>
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+#include <linux/suspend.h>
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+#include <asm/suspend.h>
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+#include <asm/uaccess.h>
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+
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+/*
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+ * Sleep modes available on SuperH Mobile:
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+ *
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+ * Sleep mode is just plain "sleep" instruction
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+ * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
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+ * Standby Self-Refresh mode is above plus stopped clocks
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+ */
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+#define SUSP_MODE_SLEEP (SUSP_SH_SLEEP)
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+#define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF)
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+#define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF)
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+
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+/*
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+ * The following modes are not there yet:
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+ *
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+ * R-standby mode is unsupported, but will be added in the future
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+ * U-standby mode is low priority since it needs bootloader hacks
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+ *
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+ * All modes should be tied in with cpuidle. But before that can
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+ * happen we need to keep track of enabled hardware blocks so we
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+ * can avoid entering sleep modes that stop clocks to hardware
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+ * blocks that are in use even though the cpu core is idle.
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+ */
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+
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+extern const unsigned char sh_mobile_standby[];
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+extern const unsigned int sh_mobile_standby_size;
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+
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+static void sh_mobile_call_standby(unsigned long mode)
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+{
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+ extern void *vbr_base;
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+ void *onchip_mem = (void *)0xe5200000; /* ILRAM */
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+ void (*standby_onchip_mem)(unsigned long) = onchip_mem;
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+
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+ /* Note: Wake up from sleep may generate exceptions!
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+ * Setup VBR to point to on-chip ram if self-refresh is
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+ * going to be used.
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+ */
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+ if (mode & SUSP_SH_SF)
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+ asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
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+
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+ /* Copy the assembly snippet to the otherwise ununsed ILRAM */
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+ memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
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+ wmb();
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+ ctrl_barrier();
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+
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+ /* Let assembly snippet in on-chip memory handle the rest */
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+ standby_onchip_mem(mode);
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+
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+ /* Put VBR back in System RAM again */
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+ if (mode & SUSP_SH_SF)
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+ asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
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+}
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+
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+static int sh_pm_enter(suspend_state_t state)
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+{
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+ local_irq_disable();
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+ set_bl_bit();
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+ sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
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+ local_irq_disable();
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+ clear_bl_bit();
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+ return 0;
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+}
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+
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+static struct platform_suspend_ops sh_pm_ops = {
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+ .enter = sh_pm_enter,
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+ .valid = suspend_valid_only_mem,
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+};
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+
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+static int __init sh_pm_init(void)
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+{
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+ suspend_set_ops(&sh_pm_ops);
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+ return 0;
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+}
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+
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+late_initcall(sh_pm_init);
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