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@@ -48,21 +48,21 @@
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/irq.h>
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-#include <mach/cpu.h>
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+#include <plat/cpu.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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-#include <mach/clock.h>
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-#include <mach/sram.h>
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-#include <mach/tc.h>
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-#include <mach/mux.h>
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-#include <mach/dma.h>
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-#include <mach/dmtimer.h>
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+#include <plat/clock.h>
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+#include <plat/sram.h>
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+#include <plat/tc.h>
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+#include <plat/mux.h>
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+#include <plat/dma.h>
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+#include <plat/dmtimer.h>
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#include "pm.h"
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#include "pm.h"
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static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
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static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
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static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
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static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
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static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
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static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
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-static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE];
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+static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE];
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static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
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static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
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static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
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static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
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@@ -183,9 +183,9 @@ static void omap_pm_wakeup_setup(void)
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* drivers must still separately call omap_set_gpio_wakeup() to
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* drivers must still separately call omap_set_gpio_wakeup() to
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* wake up to a GPIO interrupt.
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* wake up to a GPIO interrupt.
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*/
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*/
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- if (cpu_is_omap730())
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- level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
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- OMAP_IRQ_BIT(INT_730_IH2_IRQ);
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+ if (cpu_is_omap7xx())
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+ level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) |
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+ OMAP_IRQ_BIT(INT_7XX_IH2_IRQ);
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else if (cpu_is_omap15xx())
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else if (cpu_is_omap15xx())
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level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
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level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
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OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
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OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
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@@ -195,10 +195,10 @@ static void omap_pm_wakeup_setup(void)
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omap_writel(~level1_wake, OMAP_IH1_MIR);
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omap_writel(~level1_wake, OMAP_IH1_MIR);
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- if (cpu_is_omap730()) {
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+ if (cpu_is_omap7xx()) {
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omap_writel(~level2_wake, OMAP_IH2_0_MIR);
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omap_writel(~level2_wake, OMAP_IH2_0_MIR);
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- omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) |
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- OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)),
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+ omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) |
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+ OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)),
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OMAP_IH2_1_MIR);
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OMAP_IH2_1_MIR);
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
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level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
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@@ -253,15 +253,15 @@ void omap1_pm_suspend(void)
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* Save interrupt, MPUI, ARM and UPLD control registers.
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* Save interrupt, MPUI, ARM and UPLD control registers.
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*/
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*/
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- if (cpu_is_omap730()) {
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- MPUI730_SAVE(OMAP_IH1_MIR);
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- MPUI730_SAVE(OMAP_IH2_0_MIR);
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- MPUI730_SAVE(OMAP_IH2_1_MIR);
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- MPUI730_SAVE(MPUI_CTRL);
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- MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
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- MPUI730_SAVE(MPUI_DSP_API_CONFIG);
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- MPUI730_SAVE(EMIFS_CONFIG);
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- MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
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+ if (cpu_is_omap7xx()) {
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+ MPUI7XX_SAVE(OMAP_IH1_MIR);
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+ MPUI7XX_SAVE(OMAP_IH2_0_MIR);
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+ MPUI7XX_SAVE(OMAP_IH2_1_MIR);
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+ MPUI7XX_SAVE(MPUI_CTRL);
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+ MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
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+ MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
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+ MPUI7XX_SAVE(EMIFS_CONFIG);
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+ MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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MPUI1510_SAVE(OMAP_IH1_MIR);
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MPUI1510_SAVE(OMAP_IH1_MIR);
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@@ -306,7 +306,7 @@ void omap1_pm_suspend(void)
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omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
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omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
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/* shut down dsp_ck */
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/* shut down dsp_ck */
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- if (!cpu_is_omap730())
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+ if (!cpu_is_omap7xx())
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omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
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omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
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/* temporarily enabling api_ck to access DSP registers */
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/* temporarily enabling api_ck to access DSP registers */
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@@ -383,12 +383,12 @@ void omap1_pm_suspend(void)
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ULPD_RESTORE(ULPD_CLOCK_CTRL);
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ULPD_RESTORE(ULPD_CLOCK_CTRL);
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ULPD_RESTORE(ULPD_STATUS_REQ);
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ULPD_RESTORE(ULPD_STATUS_REQ);
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- if (cpu_is_omap730()) {
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- MPUI730_RESTORE(EMIFS_CONFIG);
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- MPUI730_RESTORE(EMIFF_SDRAM_CONFIG);
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- MPUI730_RESTORE(OMAP_IH1_MIR);
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- MPUI730_RESTORE(OMAP_IH2_0_MIR);
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- MPUI730_RESTORE(OMAP_IH2_1_MIR);
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+ if (cpu_is_omap7xx()) {
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+ MPUI7XX_RESTORE(EMIFS_CONFIG);
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+ MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG);
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+ MPUI7XX_RESTORE(OMAP_IH1_MIR);
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+ MPUI7XX_RESTORE(OMAP_IH2_0_MIR);
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+ MPUI7XX_RESTORE(OMAP_IH2_1_MIR);
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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MPUI1510_RESTORE(MPUI_CTRL);
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MPUI1510_RESTORE(MPUI_CTRL);
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MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG);
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MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG);
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@@ -461,13 +461,13 @@ static int omap_pm_read_proc(
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ULPD_SAVE(ULPD_DPLL_CTRL);
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ULPD_SAVE(ULPD_DPLL_CTRL);
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ULPD_SAVE(ULPD_POWER_CTRL);
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ULPD_SAVE(ULPD_POWER_CTRL);
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- if (cpu_is_omap730()) {
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- MPUI730_SAVE(MPUI_CTRL);
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- MPUI730_SAVE(MPUI_DSP_STATUS);
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- MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
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- MPUI730_SAVE(MPUI_DSP_API_CONFIG);
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- MPUI730_SAVE(EMIFF_SDRAM_CONFIG);
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- MPUI730_SAVE(EMIFS_CONFIG);
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+ if (cpu_is_omap7xx()) {
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+ MPUI7XX_SAVE(MPUI_CTRL);
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+ MPUI7XX_SAVE(MPUI_DSP_STATUS);
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+ MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
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+ MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
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+ MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
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+ MPUI7XX_SAVE(EMIFS_CONFIG);
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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MPUI1510_SAVE(MPUI_CTRL);
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MPUI1510_SAVE(MPUI_CTRL);
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MPUI1510_SAVE(MPUI_DSP_STATUS);
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MPUI1510_SAVE(MPUI_DSP_STATUS);
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@@ -517,20 +517,20 @@ static int omap_pm_read_proc(
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ULPD_SHOW(ULPD_STATUS_REQ),
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ULPD_SHOW(ULPD_STATUS_REQ),
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ULPD_SHOW(ULPD_POWER_CTRL));
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ULPD_SHOW(ULPD_POWER_CTRL));
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- if (cpu_is_omap730()) {
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+ if (cpu_is_omap7xx()) {
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my_buffer_offset += sprintf(my_base + my_buffer_offset,
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my_buffer_offset += sprintf(my_base + my_buffer_offset,
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- "MPUI730_CTRL_REG 0x%-8x \n"
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- "MPUI730_DSP_STATUS_REG: 0x%-8x \n"
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- "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
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- "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n"
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- "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n"
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- "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n",
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- MPUI730_SHOW(MPUI_CTRL),
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- MPUI730_SHOW(MPUI_DSP_STATUS),
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- MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG),
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- MPUI730_SHOW(MPUI_DSP_API_CONFIG),
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- MPUI730_SHOW(EMIFF_SDRAM_CONFIG),
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- MPUI730_SHOW(EMIFS_CONFIG));
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+ "MPUI7XX_CTRL_REG 0x%-8x \n"
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+ "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n"
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+ "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n",
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+ MPUI7XX_SHOW(MPUI_CTRL),
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+ MPUI7XX_SHOW(MPUI_DSP_STATUS),
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+ MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG),
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+ MPUI7XX_SHOW(MPUI_DSP_API_CONFIG),
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+ MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG),
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+ MPUI7XX_SHOW(EMIFS_CONFIG));
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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my_buffer_offset += sprintf(my_base + my_buffer_offset,
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my_buffer_offset += sprintf(my_base + my_buffer_offset,
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"MPUI1510_CTRL_REG 0x%-8x \n"
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"MPUI1510_CTRL_REG 0x%-8x \n"
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@@ -668,9 +668,9 @@ static int __init omap_pm_init(void)
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* These routines need to be in SRAM as that's the only
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* These routines need to be in SRAM as that's the only
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* memory the MPU can see when it wakes up.
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* memory the MPU can see when it wakes up.
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*/
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*/
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- if (cpu_is_omap730()) {
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- omap_sram_suspend = omap_sram_push(omap730_cpu_suspend,
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- omap730_cpu_suspend_sz);
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+ if (cpu_is_omap7xx()) {
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+ omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend,
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+ omap7xx_cpu_suspend_sz);
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} else if (cpu_is_omap15xx()) {
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} else if (cpu_is_omap15xx()) {
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omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend,
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omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend,
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omap1510_cpu_suspend_sz);
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omap1510_cpu_suspend_sz);
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@@ -686,8 +686,8 @@ static int __init omap_pm_init(void)
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pm_idle = omap1_pm_idle;
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pm_idle = omap1_pm_idle;
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- if (cpu_is_omap730())
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- setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq);
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+ if (cpu_is_omap7xx())
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+ setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
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else if (cpu_is_omap16xx())
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else if (cpu_is_omap16xx())
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setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
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setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
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@@ -700,8 +700,8 @@ static int __init omap_pm_init(void)
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omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL);
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omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL);
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/* Configure IDLECT3 */
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/* Configure IDLECT3 */
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- if (cpu_is_omap730())
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- omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3);
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+ if (cpu_is_omap7xx())
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+ omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3);
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else if (cpu_is_omap16xx())
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else if (cpu_is_omap16xx())
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omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);
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omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);
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