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[SPARC]: Add reboot_command[] extern decl to asm/system.h

Kill off some sparse warnings.

Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller 17 年之前
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7729d74ed5
共有 4 個文件被更改,包括 4 次插入4 次删除
  1. 0 2
      arch/sparc/kernel/process.c
  2. 0 2
      arch/sparc64/kernel/process.c
  3. 2 0
      include/asm-sparc/system.h
  4. 2 0
      include/asm-sparc64/system.h

+ 0 - 2
arch/sparc/kernel/process.c

@@ -139,8 +139,6 @@ void cpu_idle(void)
 
 #endif
 
-extern char reboot_command [];
-
 /* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */
 void machine_halt(void)
 {

+ 0 - 2
arch/sparc64/kernel/process.c

@@ -114,8 +114,6 @@ void cpu_idle(void)
 	}
 }
 
-extern char reboot_command [];
-
 void machine_halt(void)
 {
 	sstate_halt();

+ 2 - 0
include/asm-sparc/system.h

@@ -44,6 +44,8 @@ extern enum sparc_cpu sparc_cpu_model;
 
 #define SUN4M_NCPUS            4              /* Architectural limit of sun4m. */
 
+extern char reboot_command[];
+
 extern struct thread_info *current_set[NR_CPUS];
 
 extern unsigned long empty_bad_page;

+ 2 - 0
include/asm-sparc64/system.h

@@ -30,6 +30,8 @@ enum sparc_cpu {
 #define ARCH_SUN4C_SUN4 0
 #define ARCH_SUN4 0
 
+extern char reboot_command[];
+
 /* These are here in an effort to more fully work around Spitfire Errata
  * #51.  Essentially, if a memory barrier occurs soon after a mispredicted
  * branch, the chip can stop executing instructions until a trap occurs.