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@@ -43,13 +43,13 @@ bool ath_btcoex_supported(u16 subsysid)
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return false;
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}
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-void ath9k_hw_init_btcoex_hw_info(struct ath_hw *ah, int qnum)
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+void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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u32 i;
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- btcoex_info->bt_coex_mode =
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- (btcoex_info->bt_coex_mode & AR_BT_QCU_THRESH) |
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+ btcoex_hw->bt_coex_mode =
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+ (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
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SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
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SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
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SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
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@@ -60,7 +60,7 @@ void ath9k_hw_init_btcoex_hw_info(struct ath_hw *ah, int qnum)
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SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
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SM(qnum, AR_BT_QCU_THRESH);
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- btcoex_info->bt_coex_mode2 =
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+ btcoex_hw->bt_coex_mode2 =
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SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
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SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
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AR_BT_DISABLE_BT_ANT;
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@@ -71,7 +71,7 @@ void ath9k_hw_init_btcoex_hw_info(struct ath_hw *ah, int qnum)
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void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* connect bt_active to baseband */
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REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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@@ -84,15 +84,15 @@ void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
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/* Set input mux for bt_active to gpio pin */
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_ACTIVE,
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- btcoex_info->btactive_gpio);
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+ btcoex_hw->btactive_gpio);
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/* Configure the desired gpio port for input */
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- ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
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+ ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
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}
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void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* btcoex 3-wire */
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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@@ -103,51 +103,51 @@ void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
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* bt_active_async to GPIO pins */
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_ACTIVE,
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- btcoex_info->btactive_gpio);
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+ btcoex_hw->btactive_gpio);
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_PRIORITY,
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- btcoex_info->btpriority_gpio);
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+ btcoex_hw->btpriority_gpio);
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/* Configure the desired GPIO ports for input */
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- ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
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- ath9k_hw_cfg_gpio_input(ah, btcoex_info->btpriority_gpio);
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+ ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
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+ ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
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}
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static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* Configure the desired GPIO port for TX_FRAME output */
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- ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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+ ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
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}
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static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/*
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* Program coex mode and weight registers to
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* enable coex 3-wire
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*/
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- REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_info->bt_coex_mode);
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- REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_info->bt_coex_weights);
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- REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_info->bt_coex_mode2);
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+ REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_hw->bt_coex_mode);
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+ REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_hw->bt_coex_weights);
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+ REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_hw->bt_coex_mode2);
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REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
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REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
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- ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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+ ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
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}
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void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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- switch (btcoex_info->scheme) {
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+ switch (btcoex_hw->scheme) {
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case ATH_BTCOEX_CFG_NONE:
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break;
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case ATH_BTCOEX_CFG_2WIRE:
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@@ -159,26 +159,26 @@ void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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}
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REG_RMW(ah, AR_GPIO_PDPU,
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- (0x2 << (btcoex_info->btactive_gpio * 2)),
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- (0x3 << (btcoex_info->btactive_gpio * 2)));
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+ (0x2 << (btcoex_hw->btactive_gpio * 2)),
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+ (0x3 << (btcoex_hw->btactive_gpio * 2)));
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- ah->btcoex_info.enabled = true;
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+ ah->btcoex_hw.enabled = true;
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}
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void ath9k_hw_btcoex_disable(struct ath_hw *ah)
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{
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- struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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+ struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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- ath9k_hw_set_gpio(ah, btcoex_info->wlanactive_gpio, 0);
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+ ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
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- ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
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+ ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
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- if (btcoex_info->scheme == ATH_BTCOEX_CFG_3WIRE) {
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+ if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
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REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
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REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
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REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
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}
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- ah->btcoex_info.enabled = false;
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+ ah->btcoex_hw.enabled = false;
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}
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