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@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
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bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
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else
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bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
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- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
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+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (enable)
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bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
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else
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@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
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cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
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clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
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- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
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+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
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u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
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__ffs(clkdm->clktrctrl_mask));
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@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
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cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
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clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
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- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
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+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
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u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
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__ffs(clkdm->clktrctrl_mask));
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