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@@ -11,6 +11,8 @@
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* warranty of any kind, whether express or implied.
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* warranty of any kind, whether express or implied.
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*/
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*/
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+/dts-v1/;
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+
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/ {
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/ {
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model = "StorCenter";
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model = "StorCenter";
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compatible = "storcenter";
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compatible = "storcenter";
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@@ -30,19 +32,19 @@
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PowerPC,8241@0 {
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PowerPC,8241@0 {
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device_type = "cpu";
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device_type = "cpu";
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reg = <0>;
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reg = <0>;
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- clock-frequency = <d# 200000000>; /* Hz */
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- timebase-frequency = <d# 25000000>; /* Hz */
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+ clock-frequency = <200000000>;
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+ timebase-frequency = <25000000>;
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bus-frequency = <0>; /* from bootwrapper */
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bus-frequency = <0>; /* from bootwrapper */
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- i-cache-line-size = <d# 32>; /* bytes */
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- d-cache-line-size = <d# 32>; /* bytes */
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- i-cache-size = <4000>;
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- d-cache-size = <4000>;
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+ i-cache-line-size = <32>;
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+ d-cache-line-size = <32>;
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+ i-cache-size = <16384>;
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+ d-cache-size = <16384>;
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};
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};
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};
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};
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memory {
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memory {
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device_type = "memory";
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device_type = "memory";
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- reg = <00000000 04000000>; /* 64MB @ 0x0 */
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+ reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
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};
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};
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soc@fc000000 {
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soc@fc000000 {
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@@ -51,15 +53,15 @@
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device_type = "soc";
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device_type = "soc";
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compatible = "fsl,mpc8241", "mpc10x";
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compatible = "fsl,mpc8241", "mpc10x";
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store-gathering = <0>; /* 0 == off, !0 == on */
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store-gathering = <0>; /* 0 == off, !0 == on */
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- ranges = <0 fc000000 100000>;
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- reg = <fc000000 100000>; /* EUMB */
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+ ranges = <0x0 0xfc000000 0x100000>;
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+ reg = <0xfc000000 0x100000>; /* EUMB */
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bus-frequency = <0>; /* fixed by loader */
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bus-frequency = <0>; /* fixed by loader */
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i2c@3000 {
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i2c@3000 {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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- reg = <3000 100>;
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+ reg = <0x3000 0x100>;
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interrupts = <5 2>;
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interrupts = <5 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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@@ -73,9 +75,9 @@
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cell-index = <0>;
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cell-index = <0>;
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device_type = "serial";
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device_type = "serial";
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compatible = "ns16550";
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compatible = "ns16550";
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- reg = <4500 20>;
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- clock-frequency = <d# 97553800>; /* Hz */
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- current-speed = <d# 115200>;
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+ reg = <0x4500 0x20>;
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+ clock-frequency = <97553800>; /* Hz */
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+ current-speed = <115200>;
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interrupts = <9 2>;
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interrupts = <9 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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};
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};
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@@ -84,10 +86,10 @@
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cell-index = <1>;
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cell-index = <1>;
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device_type = "serial";
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device_type = "serial";
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compatible = "ns16550";
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compatible = "ns16550";
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- reg = <4600 20>;
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- clock-frequency = <d# 97553800>; /* Hz */
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- current-speed = <d# 9600>;
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- interrupts = <a 2>;
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+ reg = <0x4600 0x20>;
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+ clock-frequency = <97553800>; /* Hz */
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+ current-speed = <9600>;
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+ interrupts = <10 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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};
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};
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@@ -96,7 +98,7 @@
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device_type = "open-pic";
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device_type = "open-pic";
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compatible = "chrp,open-pic";
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compatible = "chrp,open-pic";
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interrupt-controller;
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interrupt-controller;
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- reg = <40000 40000>;
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+ reg = <0x40000 0x40000>;
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};
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};
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};
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};
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@@ -107,28 +109,29 @@
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#interrupt-cells = <1>;
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#interrupt-cells = <1>;
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device_type = "pci";
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device_type = "pci";
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compatible = "mpc10x-pci";
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compatible = "mpc10x-pci";
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- reg = <fe800000 1000>;
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- ranges = <01000000 0 0 fe000000 0 00c00000
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- 02000000 0 80000000 80000000 0 70000000>;
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- bus-range = <0 ff>;
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- clock-frequency = <d# 97553800>; /* Hz */
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+ reg = <0xfe800000 0x1000>;
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+ ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000
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+ 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
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+ bus-range = <0 0xff>;
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+ clock-frequency = <97553800>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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- interrupt-map-mask = <f800 0 0 7>;
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+ interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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interrupt-map = <
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/* IDSEL 13 - IDE */
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/* IDSEL 13 - IDE */
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- 6800 0 0 1 &mpic 0 1
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- 6800 0 0 2 &mpic 0 1
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- 6800 0 0 3 &mpic 0 1
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+ 0x6800 0 0 1 &mpic 0 1
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+ 0x6800 0 0 2 &mpic 0 1
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+ 0x6800 0 0 3 &mpic 0 1
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+ 0x6800 0 0 4 &mpic 0 1
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/* IDSEL 14 - USB */
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/* IDSEL 14 - USB */
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- 7000 0 0 1 &mpic 0 1
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- 7000 0 0 2 &mpic 0 1
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- 7000 0 0 3 &mpic 0 1
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- 7000 0 0 4 &mpic 0 1
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+ 0x7000 0 0 1 &mpic 0 1
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+ 0x7000 0 0 2 &mpic 0 1
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+ 0x7000 0 0 3 &mpic 0 1
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+ 0x7000 0 0 4 &mpic 0 1
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/* IDSEL 15 - ETH */
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/* IDSEL 15 - ETH */
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- 7800 0 0 1 &mpic 0 1
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- 7800 0 0 2 &mpic 0 1
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- 7800 0 0 3 &mpic 0 1
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- 7800 0 0 4 &mpic 0 1
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+ 0x7800 0 0 1 &mpic 0 1
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+ 0x7800 0 0 2 &mpic 0 1
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+ 0x7800 0 0 3 &mpic 0 1
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+ 0x7800 0 0 4 &mpic 0 1
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>;
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>;
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};
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};
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