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@@ -268,29 +268,6 @@ enum ath5k_ctl_mode {
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AR5K_CTL_MODE_M = 15,
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};
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-/* Default CTL ids for the 3 main reg domains.
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- * Atheros only uses these by default but vendors
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- * can have up to 32 different CTLs for different
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- * scenarios. Note that theese values are ORed with
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- * the mode id (above) so we can have up to 24 CTL
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- * datasets out of these 3 main regdomains. That leaves
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- * 8 ids that can be used by vendors and since 0x20 is
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- * missing from HAL sources i guess this is the set of
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- * custom CTLs vendors can use. */
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-#define AR5K_CTL_FCC 0x10
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-#define AR5K_CTL_CUSTOM 0x20
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-#define AR5K_CTL_ETSI 0x30
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-#define AR5K_CTL_MKK 0x40
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-
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-/* Indicates a CTL with only mode set and
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- * no reg domain mapping, such CTLs are used
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- * for world roaming domains or simply when
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- * a reg domain is not set */
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-#define AR5K_CTL_NO_REGDOMAIN 0xf0
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-
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-/* Indicates an empty (invalid) CTL */
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-#define AR5K_CTL_NO_CTL 0xff
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-
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/* Per channel calibration data, used for power table setup */
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struct ath5k_chan_pcal_info_rf5111 {
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/* Power levels in half dbm units
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