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@@ -5,12 +5,12 @@
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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- * Updated and modified by Cort Dougan (cort@cs.nmt.edu)
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- * Copyright (C) 1996 Cort Dougan
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+ * Updated and modified by Cort Dougan <cort@fsmlabs.com>
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+ * Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
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- *
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+ *
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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@@ -21,6 +21,14 @@
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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+ *
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+ * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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+ * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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+ * mask register (of which only 16 are defined), hence the weird shifting
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+ * and complement of the cached_irq_mask. I want to be able to stuff
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+ * this right into the SIU SMASK register.
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+ * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
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+ * to reduce code space and undefined function references.
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*/
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#include <linux/errno.h>
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@@ -29,6 +37,7 @@
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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+#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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@@ -40,9 +49,13 @@
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#include <linux/irq.h>
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#include <linux/proc_fs.h>
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#include <linux/random.h>
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-#include <linux/kallsyms.h>
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+#include <linux/seq_file.h>
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+#include <linux/cpumask.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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+#ifdef CONFIG_PPC64
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+#include <linux/kallsyms.h>
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+#endif
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#include <asm/uaccess.h>
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#include <asm/system.h>
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@@ -52,35 +65,54 @@
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#include <asm/cache.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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-#include <asm/iseries/it_lp_queue.h>
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#include <asm/machdep.h>
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+#ifdef CONFIG_PPC64
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+#include <asm/iseries/it_lp_queue.h>
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#include <asm/paca.h>
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+#endif
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-#ifdef CONFIG_SMP
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-extern void iSeries_smp_message_recv( struct pt_regs * );
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+static int ppc_spurious_interrupts;
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+
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+#if defined(CONFIG_PPC_ISERIES) && defined(CONFIG_SMP)
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+extern void iSeries_smp_message_recv(struct pt_regs *);
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#endif
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-extern irq_desc_t irq_desc[NR_IRQS];
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+#ifdef CONFIG_PPC32
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+#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
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+
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+unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
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+atomic_t ppc_n_lost_interrupts;
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+
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+#ifdef CONFIG_TAU_INT
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+extern int tau_initialized;
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+extern int tau_interrupts(int);
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+#endif
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+
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+#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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+extern atomic_t ipi_recv;
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+extern atomic_t ipi_sent;
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+#endif
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+#endif /* CONFIG_PPC32 */
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+
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+#ifdef CONFIG_PPC64
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EXPORT_SYMBOL(irq_desc);
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int distribute_irqs = 1;
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int __irq_offset_value;
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-int ppc_spurious_interrupts;
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u64 ppc64_interrupt_controller;
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+#endif /* CONFIG_PPC64 */
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int show_interrupts(struct seq_file *p, void *v)
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{
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- int i = *(loff_t *) v, j;
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- struct irqaction * action;
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+ int i = *(loff_t *)v, j;
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+ struct irqaction *action;
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irq_desc_t *desc;
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unsigned long flags;
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if (i == 0) {
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- seq_printf(p, " ");
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- for (j=0; j<NR_CPUS; j++) {
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- if (cpu_online(j))
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- seq_printf(p, "CPU%d ",j);
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- }
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+ seq_puts(p, " ");
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+ for_each_online_cpu(j)
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+ seq_printf(p, "CPU%d ", j);
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seq_putc(p, '\n');
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}
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@@ -92,26 +124,41 @@ int show_interrupts(struct seq_file *p, void *v)
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goto skip;
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seq_printf(p, "%3d: ", i);
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#ifdef CONFIG_SMP
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- for (j = 0; j < NR_CPUS; j++) {
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- if (cpu_online(j))
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- seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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- }
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+ for_each_online_cpu(j)
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+ seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#else
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif /* CONFIG_SMP */
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if (desc->handler)
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- seq_printf(p, " %s ", desc->handler->typename );
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+ seq_printf(p, " %s ", desc->handler->typename);
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else
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- seq_printf(p, " None ");
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+ seq_puts(p, " None ");
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seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
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- seq_printf(p, " %s",action->name);
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- for (action=action->next; action; action = action->next)
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+ seq_printf(p, " %s", action->name);
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+ for (action = action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&desc->lock, flags);
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- } else if (i == NR_IRQS)
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+ } else if (i == NR_IRQS) {
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+#ifdef CONFIG_PPC32
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+#ifdef CONFIG_TAU_INT
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+ if (tau_initialized){
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+ seq_puts(p, "TAU: ");
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+ for (j = 0; j < NR_CPUS; j++)
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+ if (cpu_online(j))
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+ seq_printf(p, "%10u ", tau_interrupts(j));
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+ seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
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+ }
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+#endif
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+#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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+ /* should this be per processor send/receive? */
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+ seq_printf(p, "IPI (recv/sent): %10u/%u\n",
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+ atomic_read(&ipi_recv), atomic_read(&ipi_sent));
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+#endif
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+#endif /* CONFIG_PPC32 */
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seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
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+ }
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return 0;
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}
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@@ -194,7 +241,7 @@ void do_IRQ(struct pt_regs *regs)
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struct thread_info *curtp, *irqtp;
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#endif
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- irq_enter();
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+ irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 2KB free? */
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@@ -211,6 +258,13 @@ void do_IRQ(struct pt_regs *regs)
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}
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#endif
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+ /*
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+ * Every platform is required to implement ppc_md.get_irq.
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+ * This function will either return an irq number or -1 to
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+ * indicate there are no more pending.
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+ * The value -2 is for buggy hardware and means that this IRQ
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+ * has already been handled. -- Tom
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+ */
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irq = ppc_md.get_irq(regs);
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if (irq >= 0) {
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@@ -229,15 +283,19 @@ void do_IRQ(struct pt_regs *regs)
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#endif
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__do_IRQ(irq, regs);
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} else
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- /* That's not SMP safe ... but who cares ? */
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- ppc_spurious_interrupts++;
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-
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- irq_exit();
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+#ifdef CONFIG_PPC32
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+ if (irq != -2)
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+#endif
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+ /* That's not SMP safe ... but who cares ? */
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+ ppc_spurious_interrupts++;
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+ irq_exit();
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}
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+
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#endif /* CONFIG_PPC_ISERIES */
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void __init init_IRQ(void)
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{
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+#ifdef CONFIG_PPC64
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static int once = 0;
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if (once)
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@@ -245,10 +303,14 @@ void __init init_IRQ(void)
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once++;
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+#endif
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ppc_md.init_IRQ();
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+#ifdef CONFIG_PPC64
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irq_ctx_init();
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+#endif
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}
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+#ifdef CONFIG_PPC64
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#ifndef CONFIG_PPC_ISERIES
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/*
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* Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
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@@ -413,3 +475,4 @@ static int __init setup_noirqdistrib(char *str)
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}
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__setup("noirqdistrib", setup_noirqdistrib);
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+#endif /* CONFIG_PPC64 */
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