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@@ -488,7 +488,7 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
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{
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struct omap_mcbsp *mcbsp;
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- if (!cpu_is_omap34xx())
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+ if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
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return;
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if (!omap_mcbsp_check_valid_id(id)) {
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@@ -510,7 +510,7 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
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{
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struct omap_mcbsp *mcbsp;
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- if (!cpu_is_omap34xx())
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+ if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
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return;
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if (!omap_mcbsp_check_valid_id(id)) {
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@@ -641,7 +641,7 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
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* Enable wakup behavior, smart idle and all wakeups
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* REVISIT: some wakeups may be unnecessary
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*/
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- if (cpu_is_omap34xx()) {
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+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
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u16 syscon;
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syscon = MCBSP_READ(mcbsp, SYSCON);
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@@ -664,7 +664,7 @@ static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
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/*
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* Disable wakup behavior, smart idle and all wakeups
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*/
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- if (cpu_is_omap34xx()) {
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+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
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u16 syscon;
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syscon = MCBSP_READ(mcbsp, SYSCON);
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@@ -913,7 +913,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
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MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
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}
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- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
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+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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/* Release the transmitter and receiver */
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w = MCBSP_READ_CACHE(mcbsp, XCCR);
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w &= ~(tx ? XDISABLE : 0);
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@@ -943,7 +943,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
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/* Reset transmitter */
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tx &= 1;
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- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
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+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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w = MCBSP_READ_CACHE(mcbsp, XCCR);
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w |= (tx ? XDISABLE : 0);
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MCBSP_WRITE(mcbsp, XCCR, w);
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@@ -953,7 +953,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
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/* Reset receiver */
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rx &= 1;
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- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
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+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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w = MCBSP_READ_CACHE(mcbsp, RCCR);
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w |= (rx ? RDISABLE : 0);
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MCBSP_WRITE(mcbsp, RCCR, w);
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