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@@ -39,11 +39,6 @@ struct ep93xx_pwm {
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u32 duty_percent;
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};
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-static inline u16 ep93xx_pwm_read_tc(struct ep93xx_pwm *pwm)
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-{
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- return readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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-}
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-
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static inline int ep93xx_pwm_is_enabled(struct ep93xx_pwm *pwm)
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{
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return readl(pwm->mmio_base + EP93XX_PWMx_ENABLE) & 0x1;
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@@ -91,7 +86,7 @@ static ssize_t ep93xx_pwm_get_freq(struct device *dev,
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if (ep93xx_pwm_is_enabled(pwm)) {
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unsigned long rate = clk_get_rate(pwm->clk);
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- u16 term = ep93xx_pwm_read_tc(pwm);
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+ u16 term = readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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return sprintf(buf, "%ld\n", rate / (term + 1));
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} else {
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@@ -122,7 +117,7 @@ static ssize_t ep93xx_pwm_set_freq(struct device *dev,
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if (val < 1)
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val = 1;
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- term = ep93xx_pwm_read_tc(pwm);
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+ term = readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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duty = ((val + 1) * pwm->duty_percent / 100) - 1;
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/* If pwm is running, order is important */
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@@ -165,7 +160,7 @@ static ssize_t ep93xx_pwm_set_duty_percent(struct device *dev,
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return -EINVAL;
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if (val > 0 && val < 100) {
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- u32 term = ep93xx_pwm_read_tc(pwm);
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+ u32 term = readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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u32 duty = ((term + 1) * val / 100) - 1;
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writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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