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net/macb: clear tx/rx completion flags in ISR

At least in the cadence IP core on the Xilinx Zynq SoC the TCOMP/RCOMP flags
are not auto-cleaned. As these flags are evaluated, they need to be cleaned.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Steffen Trumtrar 12 years ago
parent
commit
749a2b66f4
1 changed files with 3 additions and 0 deletions
  1. 3 0
      drivers/net/ethernet/cadence/macb.c

+ 3 - 0
drivers/net/ethernet/cadence/macb.c

@@ -485,6 +485,8 @@ static void macb_tx_interrupt(struct macb *bp)
 	status = macb_readl(bp, TSR);
 	macb_writel(bp, TSR, status);
 
+	macb_writel(bp, ISR, MACB_BIT(TCOMP));
+
 	netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n",
 		(unsigned long)status);
 
@@ -736,6 +738,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
 			 * now.
 			 */
 			macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
+			macb_writel(bp, ISR, MACB_BIT(RCOMP));
 
 			if (napi_schedule_prep(&bp->napi)) {
 				netdev_vdbg(bp->dev, "scheduling RX softirq\n");