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@@ -69,8 +69,9 @@
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#define PSR_c 0x000000ff /* Control */
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/*
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- * ARMv7 groups of APSR bits
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+ * ARMv7 groups of PSR bits
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*/
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+#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
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#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
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#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
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#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
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