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@@ -42,6 +42,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod;
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static struct omap_hwmod omap2420_gpio2_hwmod;
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static struct omap_hwmod omap2420_gpio3_hwmod;
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static struct omap_hwmod omap2420_gpio4_hwmod;
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+static struct omap_hwmod omap2420_dma_system_hwmod;
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
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@@ -779,6 +780,88 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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};
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+/* system dma */
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+static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
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+ .rev_offs = 0x0000,
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+ .sysc_offs = 0x002c,
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+ .syss_offs = 0x0028,
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+ .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
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+ SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
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+ SYSC_HAS_AUTOIDLE),
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+ .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap2420_dma_hwmod_class = {
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+ .name = "dma",
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+ .sysc = &omap2420_dma_sysc,
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+};
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+
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+/* dma attributes */
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+static struct omap_dma_dev_attr dma_dev_attr = {
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+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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+ IS_CSSA_32 | IS_CDSA_32,
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+ .lch_count = 32,
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+};
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+
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+static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
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+ { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
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+ { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
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+ { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
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+ { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
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+};
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+
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+static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = {
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+ {
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+ .pa_start = 0x48056000,
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+ .pa_end = 0x4a0560ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+};
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+
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+/* dma_system -> L3 */
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+static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
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+ .master = &omap2420_dma_system_hwmod,
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+ .slave = &omap2420_l3_main_hwmod,
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+ .clk = "core_l3_ck",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* dma_system master ports */
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+static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {
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+ &omap2420_dma_system__l3,
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+};
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+
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+/* l4_core -> dma_system */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
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+ .master = &omap2420_l4_core_hwmod,
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+ .slave = &omap2420_dma_system_hwmod,
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+ .clk = "sdma_ick",
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+ .addr = omap2420_dma_system_addrs,
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+ .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs),
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* dma_system slave ports */
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+static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
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+ &omap2420_l4_core__dma_system,
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+};
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+
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+static struct omap_hwmod omap2420_dma_system_hwmod = {
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+ .name = "dma",
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+ .class = &omap2420_dma_hwmod_class,
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+ .mpu_irqs = omap2420_dma_system_irqs,
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+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
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+ .main_clk = "core_l3_ck",
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+ .slaves = omap2420_dma_system_slaves,
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+ .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
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+ .masters = omap2420_dma_system_masters,
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+ .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters),
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+ .dev_attr = &dma_dev_attr,
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+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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+ .flags = HWMOD_NO_IDLEST,
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+};
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+
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static __initdata struct omap_hwmod *omap2420_hwmods[] = {
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&omap2420_l3_main_hwmod,
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&omap2420_l4_core_hwmod,
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@@ -797,6 +880,9 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
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&omap2420_gpio2_hwmod,
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&omap2420_gpio3_hwmod,
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&omap2420_gpio4_hwmod,
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+
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+ /* dma_system class*/
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+ &omap2420_dma_system_hwmod,
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NULL,
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};
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