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@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
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IRQ_NOREQUEST | IRQ_NOPROBE, 0);
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}
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-void __init omap_init_irq(void)
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+static void __init omap_init_irq(u32 base, int nr_irqs)
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{
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unsigned long nr_of_irqs = 0;
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unsigned int nr_banks = 0;
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int i, j;
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+ omap_irq_base = ioremap(base, SZ_4K);
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+ if (WARN_ON(!omap_irq_base))
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+ return;
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+
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for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
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- unsigned long base = 0;
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struct omap_irq_bank *bank = irq_banks + i;
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- if (cpu_is_omap24xx())
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- base = OMAP24XX_IC_BASE;
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- else if (cpu_is_omap34xx())
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- base = OMAP34XX_IC_BASE;
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-
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- BUG_ON(!base);
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-
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- if (cpu_is_ti816x())
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- bank->nr_irqs = 128;
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+ bank->nr_irqs = nr_irqs;
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/* Static mapping, never released */
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bank->base_reg = ioremap(base, SZ_4K);
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@@ -181,6 +176,21 @@ void __init omap_init_irq(void)
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nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
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}
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+void __init omap2_init_irq(void)
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+{
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+ omap_init_irq(OMAP24XX_IC_BASE, 96);
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+}
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+
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+void __init omap3_init_irq(void)
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+{
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+ omap_init_irq(OMAP34XX_IC_BASE, 96);
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+}
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+
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+void __init ti816x_init_irq(void)
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+{
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+ omap_init_irq(OMAP34XX_IC_BASE, 128);
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+}
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+
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#ifdef CONFIG_ARCH_OMAP3
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static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
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