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@@ -970,7 +970,10 @@ static int emulate_instruction(struct pt_regs *regs)
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#ifdef CONFIG_PPC64
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/* Emulate the mfspr rD, DSCR. */
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- if (((instword & PPC_INST_MFSPR_DSCR_MASK) == PPC_INST_MFSPR_DSCR) &&
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+ if ((((instword & PPC_INST_MFSPR_DSCR_USER_MASK) ==
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+ PPC_INST_MFSPR_DSCR_USER) ||
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+ ((instword & PPC_INST_MFSPR_DSCR_MASK) ==
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+ PPC_INST_MFSPR_DSCR)) &&
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cpu_has_feature(CPU_FTR_DSCR)) {
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PPC_WARN_EMULATED(mfdscr, regs);
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rd = (instword >> 21) & 0x1f;
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@@ -978,7 +981,10 @@ static int emulate_instruction(struct pt_regs *regs)
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return 0;
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}
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/* Emulate the mtspr DSCR, rD. */
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- if (((instword & PPC_INST_MTSPR_DSCR_MASK) == PPC_INST_MTSPR_DSCR) &&
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+ if ((((instword & PPC_INST_MTSPR_DSCR_USER_MASK) ==
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+ PPC_INST_MTSPR_DSCR_USER) ||
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+ ((instword & PPC_INST_MTSPR_DSCR_MASK) ==
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+ PPC_INST_MTSPR_DSCR)) &&
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cpu_has_feature(CPU_FTR_DSCR)) {
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PPC_WARN_EMULATED(mtdscr, regs);
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rd = (instword >> 21) & 0x1f;
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