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+/*
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+ * Copyright 2011 Freescale Semiconductor, Inc.
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+ * Copyright 2011 Linaro Ltd.
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/include/ "skeleton.dtsi"
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+
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+/ {
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+ aliases {
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+ serial0 = &uart0;
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+ serial1 = &uart1;
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+ serial2 = &uart2;
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+ serial3 = &uart3;
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+ serial4 = &uart4;
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+ };
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+
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+ tzic: tz-interrupt-controller@0fffc000 {
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+ compatible = "fsl,imx53-tzic", "fsl,tzic";
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ reg = <0x0fffc000 0x4000>;
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+ };
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+
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+ clocks {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ckil {
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+ compatible = "fsl,imx-ckil", "fixed-clock";
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+ clock-frequency = <32768>;
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+ };
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+
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+ ckih1 {
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+ compatible = "fsl,imx-ckih1", "fixed-clock";
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+ clock-frequency = <22579200>;
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+ };
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+
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+ ckih2 {
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+ compatible = "fsl,imx-ckih2", "fixed-clock";
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+ clock-frequency = <0>;
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+ };
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+
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+ osc {
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+ compatible = "fsl,imx-osc", "fixed-clock";
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+ clock-frequency = <24000000>;
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+ };
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+ };
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+
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+ soc {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "simple-bus";
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+ interrupt-parent = <&tzic>;
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+ ranges;
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+
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+ aips@50000000 { /* AIPS1 */
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+ compatible = "fsl,aips-bus", "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0x50000000 0x10000000>;
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+ ranges;
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+
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+ spba@50000000 {
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+ compatible = "fsl,spba-bus", "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0x50000000 0x40000>;
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+ ranges;
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+
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+ esdhc@50004000 { /* ESDHC1 */
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+ compatible = "fsl,imx53-esdhc";
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+ reg = <0x50004000 0x4000>;
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+ interrupts = <1>;
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+ status = "disabled";
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+ };
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+
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+ esdhc@50008000 { /* ESDHC2 */
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+ compatible = "fsl,imx53-esdhc";
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+ reg = <0x50008000 0x4000>;
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+ interrupts = <2>;
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+ status = "disabled";
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+ };
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+
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+ uart2: uart@5000c000 { /* UART3 */
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+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
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+ reg = <0x5000c000 0x4000>;
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+ interrupts = <33>;
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+ status = "disabled";
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+ };
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+
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+ ecspi@50010000 { /* ECSPI1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
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+ reg = <0x50010000 0x4000>;
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+ interrupts = <36>;
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+ status = "disabled";
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+ };
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+
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+ esdhc@50020000 { /* ESDHC3 */
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+ compatible = "fsl,imx53-esdhc";
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+ reg = <0x50020000 0x4000>;
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+ interrupts = <3>;
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+ status = "disabled";
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+ };
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+
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+ esdhc@50024000 { /* ESDHC4 */
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+ compatible = "fsl,imx53-esdhc";
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+ reg = <0x50024000 0x4000>;
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+ interrupts = <4>;
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+ status = "disabled";
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+ };
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+ };
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+
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+ gpio0: gpio@53f84000 { /* GPIO1 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53f84000 0x4000>;
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+ interrupts = <50 51>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ gpio1: gpio@53f88000 { /* GPIO2 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53f88000 0x4000>;
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+ interrupts = <52 53>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ gpio2: gpio@53f8c000 { /* GPIO3 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53f8c000 0x4000>;
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+ interrupts = <54 55>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ gpio3: gpio@53f90000 { /* GPIO4 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53f90000 0x4000>;
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+ interrupts = <56 57>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ wdog@53f98000 { /* WDOG1 */
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+ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
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+ reg = <0x53f98000 0x4000>;
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+ interrupts = <58>;
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+ status = "disabled";
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+ };
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+
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+ wdog@53f9c000 { /* WDOG2 */
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+ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
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+ reg = <0x53f9c000 0x4000>;
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+ interrupts = <59>;
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+ status = "disabled";
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+ };
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+
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+ uart0: uart@53fbc000 { /* UART1 */
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+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
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+ reg = <0x53fbc000 0x4000>;
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+ interrupts = <31>;
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+ status = "disabled";
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+ };
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+
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+ uart1: uart@53fc0000 { /* UART2 */
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+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
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+ reg = <0x53fc0000 0x4000>;
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+ interrupts = <32>;
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+ status = "disabled";
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+ };
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+
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+ gpio4: gpio@53fdc000 { /* GPIO5 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53fdc000 0x4000>;
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+ interrupts = <103 104>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ gpio5: gpio@53fe0000 { /* GPIO6 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53fe0000 0x4000>;
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+ interrupts = <105 106>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ gpio6: gpio@53fe4000 { /* GPIO7 */
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+ compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
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+ reg = <0x53fe4000 0x4000>;
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+ interrupts = <107 108>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ i2c@53fec000 { /* I2C3 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
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+ reg = <0x53fec000 0x4000>;
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+ interrupts = <64>;
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+ status = "disabled";
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+ };
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+
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+ uart3: uart@53ff0000 { /* UART4 */
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+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
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+ reg = <0x53ff0000 0x4000>;
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+ interrupts = <13>;
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+ status = "disabled";
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+ };
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+ };
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+
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+ aips@60000000 { /* AIPS2 */
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+ compatible = "fsl,aips-bus", "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0x60000000 0x10000000>;
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+ ranges;
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+
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+ uart4: uart@63f90000 { /* UART5 */
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+ compatible = "fsl,imx53-uart", "fsl,imx21-uart";
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+ reg = <0x63f90000 0x4000>;
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+ interrupts = <86>;
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+ status = "disabled";
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+ };
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+
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+ ecspi@63fac000 { /* ECSPI2 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
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+ reg = <0x63fac000 0x4000>;
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+ interrupts = <37>;
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+ status = "disabled";
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+ };
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+
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+ sdma@63fb0000 {
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+ compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
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+ reg = <0x63fb0000 0x4000>;
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+ interrupts = <6>;
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+ };
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+
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+ cspi@63fc0000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
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+ reg = <0x63fc0000 0x4000>;
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+ interrupts = <38>;
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+ status = "disabled";
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+ };
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+
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+ i2c@63fc4000 { /* I2C2 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
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+ reg = <0x63fc4000 0x4000>;
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+ interrupts = <63>;
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+ status = "disabled";
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+ };
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+
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+ i2c@63fc8000 { /* I2C1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
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+ reg = <0x63fc8000 0x4000>;
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+ interrupts = <62>;
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+ status = "disabled";
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+ };
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+
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+ fec@63fec000 {
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+ compatible = "fsl,imx53-fec", "fsl,imx25-fec";
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+ reg = <0x63fec000 0x4000>;
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+ interrupts = <87>;
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+ status = "disabled";
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+ };
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+ };
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+ };
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+};
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