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@@ -1902,30 +1902,18 @@ static void b43_do_interrupt_thread(struct b43_wldev *dev)
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}
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}
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- if (unlikely(merged_dma_reason & (B43_DMAIRQ_FATALMASK |
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- B43_DMAIRQ_NONFATALMASK))) {
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- if (merged_dma_reason & B43_DMAIRQ_FATALMASK) {
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- b43err(dev->wl, "Fatal DMA error: "
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- "0x%08X, 0x%08X, 0x%08X, "
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- "0x%08X, 0x%08X, 0x%08X\n",
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- dma_reason[0], dma_reason[1],
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- dma_reason[2], dma_reason[3],
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- dma_reason[4], dma_reason[5]);
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- b43err(dev->wl, "This device does not support DMA "
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+ if (unlikely(merged_dma_reason & (B43_DMAIRQ_FATALMASK))) {
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+ b43err(dev->wl,
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+ "Fatal DMA error: 0x%08X, 0x%08X, 0x%08X, 0x%08X, 0x%08X, 0x%08X\n",
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+ dma_reason[0], dma_reason[1],
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+ dma_reason[2], dma_reason[3],
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+ dma_reason[4], dma_reason[5]);
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+ b43err(dev->wl, "This device does not support DMA "
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"on your system. It will now be switched to PIO.\n");
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- /* Fall back to PIO transfers if we get fatal DMA errors! */
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- dev->use_pio = true;
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- b43_controller_restart(dev, "DMA error");
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- return;
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- }
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- if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) {
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- b43err(dev->wl, "DMA error: "
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- "0x%08X, 0x%08X, 0x%08X, "
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- "0x%08X, 0x%08X, 0x%08X\n",
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- dma_reason[0], dma_reason[1],
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- dma_reason[2], dma_reason[3],
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- dma_reason[4], dma_reason[5]);
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- }
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+ /* Fall back to PIO transfers if we get fatal DMA errors! */
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+ dev->use_pio = true;
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+ b43_controller_restart(dev, "DMA error");
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+ return;
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}
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if (unlikely(reason & B43_IRQ_UCODE_DEBUG))
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@@ -1944,6 +1932,11 @@ static void b43_do_interrupt_thread(struct b43_wldev *dev)
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handle_irq_noise(dev);
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/* Check the DMA reason registers for received data. */
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+ if (dma_reason[0] & B43_DMAIRQ_RDESC_UFLOW) {
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+ if (B43_DEBUG)
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+ b43warn(dev->wl, "RX descriptor underrun\n");
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+ b43_dma_handle_rx_overflow(dev->dma.rx_ring);
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+ }
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if (dma_reason[0] & B43_DMAIRQ_RX_DONE) {
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if (b43_using_pio_transfers(dev))
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b43_pio_rx(dev->pio.rx_queue);
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@@ -2001,7 +1994,7 @@ static irqreturn_t b43_do_interrupt(struct b43_wldev *dev)
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return IRQ_NONE;
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dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON)
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- & 0x0001DC00;
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+ & 0x0001FC00;
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dev->dma_reason[1] = b43_read32(dev, B43_MMIO_DMA1_REASON)
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& 0x0000DC00;
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dev->dma_reason[2] = b43_read32(dev, B43_MMIO_DMA2_REASON)
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@@ -3130,7 +3123,7 @@ static int b43_chip_init(struct b43_wldev *dev)
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b43_write32(dev, 0x018C, 0x02000000);
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}
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b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, 0x00004000);
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- b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
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+ b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001FC00);
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b43_write32(dev, B43_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
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b43_write32(dev, B43_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
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b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
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