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@@ -36,9 +36,20 @@
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#include <asm/mpc8260.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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+#include <asm/fs_pd.h>
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#include "cpm2_pic.h"
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+/* External IRQS */
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+#define CPM2_IRQ_EXT1 19
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+#define CPM2_IRQ_EXT7 25
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+
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+/* Port C IRQS */
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+#define CPM2_IRQ_PORTC15 48
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+#define CPM2_IRQ_PORTC0 63
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+
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+static intctl_cpm2_t *cpm2_intctl;
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+
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static struct device_node *cpm2_pic_node;
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static struct irq_host *cpm2_pic_host;
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#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
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@@ -68,68 +79,55 @@ static const u_char irq_to_siubit[] = {
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24, 25, 26, 27, 28, 29, 30, 31,
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};
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-static void cpm2_mask_irq(unsigned int irq_nr)
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+static void cpm2_mask_irq(unsigned int virq)
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{
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int bit, word;
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- volatile uint *simr;
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-
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- irq_nr -= CPM_IRQ_OFFSET;
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+ unsigned int irq_nr = virq_to_hw(virq);
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bit = irq_to_siubit[irq_nr];
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word = irq_to_siureg[irq_nr];
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- simr = &(cpm2_intctl->ic_simrh);
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ppc_cached_irq_mask[word] &= ~(1 << bit);
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- simr[word] = ppc_cached_irq_mask[word];
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+ out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
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}
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-static void cpm2_unmask_irq(unsigned int irq_nr)
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+static void cpm2_unmask_irq(unsigned int virq)
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{
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int bit, word;
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- volatile uint *simr;
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-
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- irq_nr -= CPM_IRQ_OFFSET;
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+ unsigned int irq_nr = virq_to_hw(virq);
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bit = irq_to_siubit[irq_nr];
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word = irq_to_siureg[irq_nr];
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- simr = &(cpm2_intctl->ic_simrh);
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ppc_cached_irq_mask[word] |= 1 << bit;
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- simr[word] = ppc_cached_irq_mask[word];
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+ out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
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}
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-static void cpm2_mask_and_ack(unsigned int irq_nr)
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+static void cpm2_ack(unsigned int virq)
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{
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int bit, word;
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- volatile uint *simr, *sipnr;
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-
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- irq_nr -= CPM_IRQ_OFFSET;
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+ unsigned int irq_nr = virq_to_hw(virq);
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bit = irq_to_siubit[irq_nr];
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word = irq_to_siureg[irq_nr];
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- simr = &(cpm2_intctl->ic_simrh);
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- sipnr = &(cpm2_intctl->ic_sipnrh);
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- ppc_cached_irq_mask[word] &= ~(1 << bit);
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- simr[word] = ppc_cached_irq_mask[word];
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- sipnr[word] = 1 << bit;
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+ out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit);
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}
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-static void cpm2_end_irq(unsigned int irq_nr)
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+static void cpm2_end_irq(unsigned int virq)
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{
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int bit, word;
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- volatile uint *simr;
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+ unsigned int irq_nr = virq_to_hw(virq);
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if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
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&& irq_desc[irq_nr].action) {
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- irq_nr -= CPM_IRQ_OFFSET;
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bit = irq_to_siubit[irq_nr];
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word = irq_to_siureg[irq_nr];
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- simr = &(cpm2_intctl->ic_simrh);
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ppc_cached_irq_mask[word] |= 1 << bit;
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- simr[word] = ppc_cached_irq_mask[word];
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+ out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
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+
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/*
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* Work around large numbers of spurious IRQs on PowerPC 82xx
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* systems.
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@@ -138,13 +136,59 @@ static void cpm2_end_irq(unsigned int irq_nr)
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}
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}
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+static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
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+{
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+ unsigned int src = virq_to_hw(virq);
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+ struct irq_desc *desc = get_irq_desc(virq);
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+ unsigned int vold, vnew, edibit;
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+
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+ if (flow_type == IRQ_TYPE_NONE)
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+ flow_type = IRQ_TYPE_LEVEL_LOW;
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+
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+ if (flow_type & IRQ_TYPE_EDGE_RISING) {
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+ printk(KERN_ERR "CPM2 PIC: sense type 0x%x not supported\n",
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+ flow_type);
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+ return -EINVAL;
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+ }
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+
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+ desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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+ desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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+ if (flow_type & IRQ_TYPE_LEVEL_LOW) {
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+ desc->status |= IRQ_LEVEL;
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+ desc->handle_irq = handle_level_irq;
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+ } else
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+ desc->handle_irq = handle_edge_irq;
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+
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+ /* internal IRQ senses are LEVEL_LOW
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+ * EXT IRQ and Port C IRQ senses are programmable
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+ */
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+ if (src >= CPM2_IRQ_EXT1 && src <= CPM2_IRQ_EXT7)
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+ edibit = (14 - (src - CPM2_IRQ_EXT1));
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+ else
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+ if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0)
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+ edibit = (31 - (src - CPM2_IRQ_PORTC15));
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+ else
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+ return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL;
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+
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+ vold = in_be32(&cpm2_intctl->ic_siexr);
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+
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+ if ((flow_type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_FALLING)
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+ vnew = vold | (1 << edibit);
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+ else
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+ vnew = vold & ~(1 << edibit);
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+
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+ if (vold != vnew)
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+ out_be32(&cpm2_intctl->ic_siexr, vnew);
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+ return 0;
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+}
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+
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static struct irq_chip cpm2_pic = {
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.typename = " CPM2 SIU ",
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- .enable = cpm2_unmask_irq,
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- .disable = cpm2_mask_irq,
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+ .mask = cpm2_mask_irq,
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.unmask = cpm2_unmask_irq,
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- .mask_ack = cpm2_mask_and_ack,
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- .end = cpm2_end_irq,
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+ .ack = cpm2_ack,
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+ .eoi = cpm2_end_irq,
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+ .set_type = cpm2_set_irq_type,
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};
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unsigned int cpm2_get_irq(void)
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@@ -154,17 +198,17 @@ unsigned int cpm2_get_irq(void)
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/* For CPM2, read the SIVEC register and shift the bits down
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* to get the irq number. */
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- bits = cpm2_intctl->ic_sivec;
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+ bits = in_be32(&cpm2_intctl->ic_sivec);
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irq = bits >> 26;
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if (irq == 0)
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return(-1);
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- return irq+CPM_IRQ_OFFSET;
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+ return irq_linear_revmap(cpm2_pic_host, irq);
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}
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static int cpm2_pic_host_match(struct irq_host *h, struct device_node *node)
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{
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- return cpm2_pic_node == NULL || cpm2_pic_node == node;
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+ return cpm2_pic_node == node;
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}
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static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
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@@ -177,39 +221,21 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
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return 0;
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}
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-static void cpm2_host_unmap(struct irq_host *h, unsigned int virq)
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-{
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- /* Make sure irq is masked in hardware */
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- cpm2_mask_irq(virq);
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-
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- /* remove chip and handler */
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- set_irq_chip_and_handler(virq, NULL, NULL);
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-}
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-
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static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct,
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u32 *intspec, unsigned int intsize,
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irq_hw_number_t *out_hwirq, unsigned int *out_flags)
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{
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- static const unsigned char map_cpm2_senses[4] = {
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- IRQ_TYPE_LEVEL_LOW,
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- IRQ_TYPE_LEVEL_HIGH,
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- IRQ_TYPE_EDGE_FALLING,
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- IRQ_TYPE_EDGE_RISING,
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- };
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-
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*out_hwirq = intspec[0];
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- if (intsize > 1 && intspec[1] < 4)
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- *out_flags = map_cpm2_senses[intspec[1]];
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+ if (intsize > 1)
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+ *out_flags = intspec[1];
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else
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*out_flags = IRQ_TYPE_NONE;
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-
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return 0;
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}
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static struct irq_host_ops cpm2_pic_host_ops = {
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.match = cpm2_pic_host_match,
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.map = cpm2_pic_host_map,
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- .unmap = cpm2_host_unmap,
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.xlate = cpm2_pic_host_xlate,
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};
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@@ -217,32 +243,34 @@ void cpm2_pic_init(struct device_node *node)
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{
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int i;
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+ cpm2_intctl = cpm2_map(im_intctl);
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+
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/* Clear the CPM IRQ controller, in case it has any bits set
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* from the bootloader
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*/
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/* Mask out everything */
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- cpm2_intctl->ic_simrh = 0x00000000;
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- cpm2_intctl->ic_simrl = 0x00000000;
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+ out_be32(&cpm2_intctl->ic_simrh, 0x00000000);
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+ out_be32(&cpm2_intctl->ic_simrl, 0x00000000);
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wmb();
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/* Ack everything */
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- cpm2_intctl->ic_sipnrh = 0xffffffff;
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- cpm2_intctl->ic_sipnrl = 0xffffffff;
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+ out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff);
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+ out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff);
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wmb();
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/* Dummy read of the vector */
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- i = cpm2_intctl->ic_sivec;
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+ i = in_be32(&cpm2_intctl->ic_sivec);
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rmb();
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/* Initialize the default interrupt mapping priorities,
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* in case the boot rom changed something on us.
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*/
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- cpm2_intctl->ic_sicr = 0;
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- cpm2_intctl->ic_scprrh = 0x05309770;
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- cpm2_intctl->ic_scprrl = 0x05309770;
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+ out_be16(&cpm2_intctl->ic_sicr, 0);
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+ out_be32(&cpm2_intctl->ic_scprrh, 0x05309770);
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+ out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
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/* create a legacy host */
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cpm2_pic_node = of_node_get(node);
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Vitaly Bordug