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@@ -661,7 +661,7 @@ ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask)
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ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr1,
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AR5K_SISR1_QCU_TXEOL);
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- /* Currently this is not much usefull since we treat
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+ /* Currently this is not much useful since we treat
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* all queues the same way if we get a TXURN (update
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* tx trigger level) but we might need it later on*/
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if (pisr & AR5K_ISR_TXURN)
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